diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2012-06-13 10:20:58 +0800 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2012-07-01 21:57:29 +0800 |
commit | f3eac29da1f6a477722b56ff00228e8a13f8f6c6 (patch) | |
tree | 8b50b39a755008a9f890d7b31600940584140dc1 /arch/arm/plat-mxc | |
parent | 1ab7ef158dfbaf6314b6660a3e3fb037cba2a1ca (diff) |
ARM: imx: move irq_domain_add_legacy call into tzic driver
Move irq_domain_add_legacy call from imx5*-dt.c into tzic init function
and have the tzic driver adopt irqdomain support for both DT and non-DT
boot.
Now tzic init function calls irq_alloc_descs to get irq_base and adds
a lenacy irqdomain with the irq_base, so that the mapping between tzic
irq and Linux irq number can be handled by irqdomain.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r-- | arch/arm/plat-mxc/tzic.c | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index 98308ec1f32..abc90e4116f 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -15,6 +15,8 @@ #include <linux/device.h> #include <linux/errno.h> #include <linux/io.h> +#include <linux/irqdomain.h> +#include <linux/of.h> #include <asm/mach/irq.h> #include <asm/exception.h> @@ -49,6 +51,7 @@ #define TZIC_ID0 0x0FD0 /* Indentification Register 0 */ void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */ +static struct irq_domain *domain; #define TZIC_NUM_IRQS 128 @@ -77,15 +80,14 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) static void tzic_irq_suspend(struct irq_data *d) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); - int idx = gc->irq_base >> 5; + int idx = d->hwirq >> 5; __raw_writel(gc->wake_active, tzic_base + TZIC_WAKEUP0(idx)); } static void tzic_irq_resume(struct irq_data *d) { - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); - int idx = gc->irq_base >> 5; + int idx = d->hwirq >> 5; __raw_writel(__raw_readl(tzic_base + TZIC_ENSET0(idx)), tzic_base + TZIC_WAKEUP0(idx)); @@ -102,11 +104,10 @@ static struct mxc_extra_irq tzic_extra_irq = { #endif }; -static __init void tzic_init_gc(unsigned int irq_start) +static __init void tzic_init_gc(int idx, unsigned int irq_start) { struct irq_chip_generic *gc; struct irq_chip_type *ct; - int idx = irq_start >> 5; gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base, handle_level_irq); @@ -140,7 +141,8 @@ asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs) while (stat) { handled = 1; irqofs = fls(stat) - 1; - handle_IRQ(irqofs + i * 32, regs); + handle_IRQ(irq_find_mapping(domain, + irqofs + i * 32), regs); stat &= ~(1 << irqofs); } } @@ -154,6 +156,8 @@ asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs) */ void __init tzic_init_irq(void __iomem *irqbase) { + struct device_node *np; + int irq_base; int i; tzic_base = irqbase; @@ -175,8 +179,16 @@ void __init tzic_init_irq(void __iomem *irqbase) /* all IRQ no FIQ Warning :: No selection */ - for (i = 0; i < TZIC_NUM_IRQS; i += 32) - tzic_init_gc(i); + irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id()); + WARN_ON(irq_base < 0); + + np = of_find_compatible_node(NULL, NULL, "fsl,tzic"); + domain = irq_domain_add_legacy(np, TZIC_NUM_IRQS, irq_base, 0, + &irq_domain_simple_ops, NULL); + WARN_ON(!domain); + + for (i = 0; i < 4; i++, irq_base += 32) + tzic_init_gc(i, irq_base); #ifdef CONFIG_FIQ /* Initialize FIQ */ |