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authorFrederic Weisbecker <fweisbec@gmail.com>2010-08-09 01:49:58 +0200
committerFrederic Weisbecker <fweisbec@gmail.com>2010-08-09 02:14:15 +0200
commitd9a145fb6e5f37b9903dea8371ab5c3e34e8e2d1 (patch)
treee2b4bb46fa00f0ad20447e40dba6fb21a4ae0815 /arch/arm/plat-omap/dma.c
parentc9243f5bdd6637b2bb7dc254b54d9edf957ef17e (diff)
parent45d7f32c7a43cbb9592886d38190e379e2eb2226 (diff)
Merge commit 'linus/master' into bkl/core
Merge reason: The staging tree has introduced the easycap driver lately. We need the latest updates to pushdown the bkl in its ioctl helper.
Diffstat (limited to 'arch/arm/plat-omap/dma.c')
-rw-r--r--arch/arm/plat-omap/dma.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index f7f571e7987..ec7eddf9e52 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -290,7 +290,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
val = dma_read(CCR(lch));
/* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
- val &= ~((3 << 19) | 0x1f);
+ val &= ~((1 << 23) | (3 << 19) | 0x1f);
val |= (dma_trigger & ~0x1f) << 14;
val |= dma_trigger & 0x1f;
@@ -304,11 +304,14 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
else
val &= ~(1 << 18);
- if (src_or_dst_synch)
+ if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) {
+ val &= ~(1 << 24); /* dest synch */
+ val |= (1 << 23); /* Prefetch */
+ } else if (src_or_dst_synch) {
val |= 1 << 24; /* source synch */
- else
+ } else {
val &= ~(1 << 24); /* dest synch */
-
+ }
dma_write(val, CCR(lch));
}