diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-08-17 13:36:39 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-08-17 13:36:39 -0700 |
| commit | 0f66f96d21b4bbff49baaa337546e687d7c58e87 (patch) | |
| tree | 2c14b16a23a8c41fbefc3f0d30e490dacaf4d94d /arch/arm/plat-omap/include/mach/sdrc.h | |
| parent | 894ef820b10d77e2d6d717342fc408bdd9825139 (diff) | |
| parent | a2bb9f4d6a5a589b481595207ac3588cc08d1b60 (diff) | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (37 commits)
ARM: 5673/1: U300 fix initsection compile warning
ARM: Fix broken highmem support
mx31moboard: invert sdhc ro signal sense
ARM: S3C24XX: Fix clkout mpx error
ARM: S3C64XX: serial: Fix a typo in Kconfig
IXP4xx: Fix IO_SPACE_LIMIT for 2.6.31-rc core PCI changes
OMAP3: RX51: Updated rx51_defconfig
OMAP2/3: mmc-twl4030: Free up MMC regulators while cleaning up
OMAP3: RX51: Define TWL4030 USB transceiver in board file
OMAP3: Overo: Fix smsc911x platform device resource value
OMAP3: Fix omap3 sram virtual addres overlap vmalloc space after increasing vmalloc size
OMAP2/3: DMA errata correction
OMAP: Fix testing of cpu defines for mach-omap1
OMAP3: Overo: add missing pen-down GPIO definition
OMAP: GPIO: clear/restore level/edge detect settings on mask/unmask
OMAP3: PM: Fix wrong sequence in suspend.
OMAP: PM: CPUfreq: obey min/max settings of policy
OMAP2/3/4: UART: allow in-order port traversal
OMAP2/3/4: UART: Allow per-UART disabling wakeup for serial ports
OMAP3: Fixed crash bug with serial + suspend
...
Diffstat (limited to 'arch/arm/plat-omap/include/mach/sdrc.h')
| -rw-r--r-- | arch/arm/plat-omap/include/mach/sdrc.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index adc73522491..0be18e4ff18 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h @@ -30,6 +30,10 @@ #define SDRC_ACTIM_CTRL_A_0 0x09c #define SDRC_ACTIM_CTRL_B_0 0x0a0 #define SDRC_RFR_CTRL_0 0x0a4 +#define SDRC_MR_1 0x0B4 +#define SDRC_ACTIM_CTRL_A_1 0x0C4 +#define SDRC_ACTIM_CTRL_B_1 0x0C8 +#define SDRC_RFR_CTRL_1 0x0D4 /* * These values represent the number of memory clock cycles between @@ -102,8 +106,11 @@ struct omap_sdrc_params { u32 mr; }; -void __init omap2_sdrc_init(struct omap_sdrc_params *sp); -struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r); +void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, + struct omap_sdrc_params *sdrc_cs1); +int omap2_sdrc_get_params(unsigned long r, + struct omap_sdrc_params **sdrc_cs0, + struct omap_sdrc_params **sdrc_cs1); #ifdef CONFIG_ARCH_OMAP2 |