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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 14:37:41 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 14:37:41 -0800
commit6d889d03ab1417645e76e129834f76204bae37c0 (patch)
tree577e37b5597b27f6de25bbbc634a0f17ccfb15f7 /arch/arm/plat-omap
parent7400c12eb069df781894a94dfa5c865f3fe3e2d4 (diff)
parent421b759b86eb8a914cbbd11f6d09a74f411762c6 (diff)
Merge tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Board-level changes This adds and extends support for specific boards on a number of ARM platforms: omap, imx, samsung, tegra, ... * tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits) Enable 32 bit flash support for iMX21ADS board ARM: mx31pdk: Add MC13783 RTC support iomux-mx25: configuration to support CSPI3 on CSI pins MX1:apf9328: Add i2c support mioa701: add newly available DoC G3 chip arm/tegra: remove __initdata annotation from pinmux tables arm/tegra: Use bus notifiers to trigger pinmux setup arm/tegra: Refactor board-*-pinmux.c to share code arm/tegra: Fix mistake in Trimslice's pinmux arm/tegra: Rework Seaboard-vs-Ventana pinmux table arm/tegra: Remove useless entries from ventana_pinmux[] arm/tegra: PCIe: Remove include of mach/pinmux.h arm/tegra: Harmony PCIe: Don't touch pinmux arm/tegra: Add AUXDATA for tegra-pinmux and tegra-gpio arm/tegra: Split Seaboard GPIO table to allow for Ventana ARM: imx6q: generate imx6q dtb files arm/imx6q: Rename Sabreauto to Armadillo2 arm/imx6q-sabrelite: add enet phy ksz9021rn fixup arm/imx6: add imx6q sabrelite board support dts/imx: rename uart labels to consistent with hw spec ...
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h3
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h32
2 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 7fbc361946b..6ee90495ca4 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -179,6 +179,9 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
/* TI8168 base boards using UART3 */
DEBUG_LL_TI81XX(3, ti8168evm);
+ /* TI8148 base boards using UART1 */
+ DEBUG_LL_TI81XX(1, ti8148evm);
+
} while (0);
}
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 17d3c939775..c616385f27b 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -114,6 +114,7 @@ extern void am35x_musb_reset(void);
extern void am35x_musb_phy_power(u8 on);
extern void am35x_musb_clear_irq(void);
extern void am35x_set_mode(u8 musb_mode);
+extern void ti81xx_musb_phy_power(u8 on);
/*
* FIXME correct answer depends on hmc_mode,
@@ -273,6 +274,37 @@ static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
#define CONF2_OTGPWRDN (1 << 2)
#define CONF2_DATPOL (1 << 1)
+/* TI81XX specific definitions */
+#define USBCTRL0 0x620
+#define USBSTAT0 0x624
+
+/* TI816X PHY controls bits */
+#define TI816X_USBPHY0_NORMAL_MODE (1 << 0)
+#define TI816X_USBPHY_REFCLK_OSC (1 << 8)
+
+/* TI814X PHY controls bits */
+#define USBPHY_CM_PWRDN (1 << 0)
+#define USBPHY_OTG_PWRDN (1 << 1)
+#define USBPHY_CHGDET_DIS (1 << 2)
+#define USBPHY_CHGDET_RSTRT (1 << 3)
+#define USBPHY_SRCONDM (1 << 4)
+#define USBPHY_SINKONDP (1 << 5)
+#define USBPHY_CHGISINK_EN (1 << 6)
+#define USBPHY_CHGVSRC_EN (1 << 7)
+#define USBPHY_DMPULLUP (1 << 8)
+#define USBPHY_DPPULLUP (1 << 9)
+#define USBPHY_CDET_EXTCTL (1 << 10)
+#define USBPHY_GPIO_MODE (1 << 12)
+#define USBPHY_DPOPBUFCTL (1 << 13)
+#define USBPHY_DMOPBUFCTL (1 << 14)
+#define USBPHY_DPINPUT (1 << 15)
+#define USBPHY_DMINPUT (1 << 16)
+#define USBPHY_DPGPIO_PD (1 << 17)
+#define USBPHY_DMGPIO_PD (1 << 18)
+#define USBPHY_OTGVDET_EN (1 << 19)
+#define USBPHY_OTGSESSEND_EN (1 << 20)
+#define USBPHY_DATA_POLARITY (1 << 23)
+
#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
u32 omap1_usb1_init(unsigned nwires);