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authorNicolas Pitre <nico@fluxnic.net>2010-10-21 15:48:33 -0400
committerNicolas Pitre <nico@fluxnic.net>2010-10-21 15:52:03 -0400
commit3924996bab2845bdf9a9d16ff7c20445de1ab55d (patch)
tree8d70c64909df1a8d29f7405eea63ccf4adf5385d /arch/arm/plat-orion/include
parentd3491820e8a65c4a51c8e2a165c6a13f864101ba (diff)
[ARM] Kirkwood: restrict the scope of the PCIe reset workaround
Commit 21f0ba90a447 "orion/kirkwood: reset PCIe unit on boot" made the reset of the PCIe unit unconditional. While this may fix problems on some targets, this also causes problems on other targets. Saeed Bishara <saeed@marvell.com> said about the original problem: "We couln't pinpoint the root cause of this issue, actually we failed to reproduce that issue." So let's restrict the reset of the PCIe unit only to the target where the original problem was observed. Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch/arm/plat-orion/include')
-rw-r--r--arch/arm/plat-orion/include/plat/pcie.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h
index 3ebfef72b4e..cc99163e73f 100644
--- a/arch/arm/plat-orion/include/plat/pcie.h
+++ b/arch/arm/plat-orion/include/plat/pcie.h
@@ -11,12 +11,15 @@
#ifndef __PLAT_PCIE_H
#define __PLAT_PCIE_H
+struct pci_bus;
+
u32 orion_pcie_dev_id(void __iomem *base);
u32 orion_pcie_rev(void __iomem *base);
int orion_pcie_link_up(void __iomem *base);
int orion_pcie_x4_mode(void __iomem *base);
int orion_pcie_get_local_bus_nr(void __iomem *base);
void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
+void orion_pcie_reset(void __iomem *base);
void orion_pcie_setup(void __iomem *base,
struct mbus_dram_target_info *dram);
int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,