diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2008-11-21 10:36:03 +0000 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-16 10:01:23 +0000 |
| commit | b09bcdd4c2f52b54115895c4d62ad82918f71431 (patch) | |
| tree | d6e7e39a0f31c98403af4362fb97bfa9345883dc /arch/arm/plat-s3c/include/plat/regs-timer.h | |
| parent | 44539a711217898358ae456fc0f81f5f4652abd5 (diff) | |
[ARM] S3C64XX: Update TCFG for new timer divider settings.
The S3C64XX series has a new TCFG divider setting to allow the clock
directly through, which means that we need to update the pwm-clock
code to cope with this.
Add <mach/pwm-clock.h> containing the specific code to deal with the
TCFG divider settings and provide any other per-arch data that the
pwm-clock driver needs to function.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c/include/plat/regs-timer.h')
| -rw-r--r-- | arch/arm/plat-s3c/include/plat/regs-timer.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c/include/plat/regs-timer.h b/arch/arm/plat-s3c/include/plat/regs-timer.h index 086ce268583..d097d92f8cc 100644 --- a/arch/arm/plat-s3c/include/plat/regs-timer.h +++ b/arch/arm/plat-s3c/include/plat/regs-timer.h @@ -73,6 +73,14 @@ #define S3C2410_TCFG1_MUX_TCLK (4<<0) #define S3C2410_TCFG1_MUX_MASK (15<<0) +#define S3C64XX_TCFG1_MUX_DIV1 (0<<0) +#define S3C64XX_TCFG1_MUX_DIV2 (1<<0) +#define S3C64XX_TCFG1_MUX_DIV4 (2<<0) +#define S3C64XX_TCFG1_MUX_DIV8 (3<<0) +#define S3C64XX_TCFG1_MUX_DIV16 (4<<0) +#define S3C64XX_TCFG1_MUX_TCLK (5<<0) /* 3 sets of TCLK */ +#define S3C64XX_TCFG1_MUX_MASK (15<<0) + #define S3C2410_TCFG1_SHIFT(x) ((x) * 4) /* for each timer, we have an count buffer, an compare buffer and |