diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2008-12-12 00:24:06 +0000 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2009-03-08 12:23:51 +0000 |
| commit | 6419711a164ba1304fa8fbb75ae9485455e04dcd (patch) | |
| tree | 15fe79b0ffff33d253258b849f1b69ac4c2c3bbe /arch/arm/plat-s3c24xx/sleep.S | |
| parent | a3f66351b3cc89011e8a34068c245b413ce696d6 (diff) | |
[ARM] S3C: Move PM support functions to common location
Start moving the PM code by moving all the common support functions
to a common location in arch/arm/plat-s3c. With the move we rename
the functions from s3cxxx_ to s3c_ to fit the new location.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx/sleep.S')
| -rw-r--r-- | arch/arm/plat-s3c24xx/sleep.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S index 76594b21280..7c1955ff317 100644 --- a/arch/arm/plat-s3c24xx/sleep.S +++ b/arch/arm/plat-s3c24xx/sleep.S @@ -84,7 +84,7 @@ resume_with_mmu: .ltorg @@ the next bits sit in the .data segment, even though they - @@ happen to be code... the s3c2410_sleep_save_phys needs to be + @@ happen to be code... the s3c_sleep_save_phys needs to be @@ accessed by the resume code before it can restore the MMU. @@ This means that the variable has to be close enough for the @@ code to read it... since the .text segment needs to be RO, @@ -92,8 +92,8 @@ resume_with_mmu: .data - .global s3c2410_sleep_save_phys -s3c2410_sleep_save_phys: + .global s3c_sleep_save_phys +s3c_sleep_save_phys: .word 0 @@ -145,7 +145,7 @@ ENTRY(s3c2410_cpu_resume) mcr p15, 0, r1, c8, c7, 0 @@ invalidate I & D TLBs mcr p15, 0, r1, c7, c7, 0 @@ invalidate I & D caches - ldr r0, s3c2410_sleep_save_phys @ address of restore block + ldr r0, s3c_sleep_save_phys @ address of restore block ldmia r0, { r4 - r13 } mcr p15, 0, r4, c13, c0, 0 @ PID |