diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-12-12 00:24:19 +0000 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2009-03-08 12:37:05 +0000 |
commit | ef30e14420df546bc6576b00f9caf3379b6699d1 (patch) | |
tree | 8037b6f610fee43c8b71088dd0a6d65d7d6df937 /arch/arm/plat-s3c24xx | |
parent | 4e59c25dcbc1f033d043f1009a7f6aaa1f2aef26 (diff) |
[ARM] S3C: Rename sleep.S functions to be non-cpu specific
Rename s3c2410_cpu_resume to s3c_cpu_resume and s3c2410_cpu_save to
s3c_cpu_save to remove the CPU specific naming of these functions
which are now in the generic PM code.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx')
-rw-r--r-- | arch/arm/plat-s3c24xx/sleep.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S index 7c1955ff317..ecb830be67d 100644 --- a/arch/arm/plat-s3c24xx/sleep.S +++ b/arch/arm/plat-s3c24xx/sleep.S @@ -41,7 +41,7 @@ .text - /* s3c2410_cpu_save + /* s3c_cpu_save * * save enough of the CPU state to allow us to re-start * pm.c code. as we store items like the sp/lr, we will @@ -59,7 +59,7 @@ * 1 => resumed from sleep */ -ENTRY(s3c2410_cpu_save) +ENTRY(s3c_cpu_save) stmfd sp!, { r4 - r12, lr } @@ store co-processor registers @@ -99,12 +99,12 @@ s3c_sleep_save_phys: /* sleep magic, to allow the bootloader to check for an valid * image to resume to. Must be the first word before the - * s3c2410_cpu_resume entry. + * s3c_cpu_resume entry. */ .word 0x2bedf00d - /* s3c2410_cpu_resume + /* s3c_cpu_resume * * resume code entry for bootloader to call * @@ -113,7 +113,7 @@ s3c_sleep_save_phys: * must not write to the code segment (code is read-only) */ -ENTRY(s3c2410_cpu_resume) +ENTRY(s3c_cpu_resume) mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE msr cpsr_c, r0 |