diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2010-09-01 15:35:30 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-18 18:33:02 +0900 |
| commit | 3109e55099cb013f9e1b63d39606dc5d7ecf25bd (patch) | |
| tree | 46fc9d0af9f08df90b079f953b4c0015e7f6134a /arch/arm/plat-s5p/clock.c | |
| parent | a2e0d6249fa866ce7f5a8fe08a4d75511e4701c6 (diff) | |
ARM: S5P64X0: Update Clock for S5P6440 and S5P6450
This patch updates regarding clock files for supporting S5P6440 and
S5P6450 with one kernel image. The mach-s5p64x0/clock.c is for common
of them and there are specific clock files for each SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s5p/clock.c')
| -rw-r--r-- | arch/arm/plat-s5p/clock.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c index b5e255265f2..8aaf4e6b60c 100644 --- a/arch/arm/plat-s5p/clock.c +++ b/arch/arm/plat-s5p/clock.c @@ -74,6 +74,13 @@ struct clk clk_fout_epll = { .ctrlbit = (1 << 31), }; +/* DPLL clock output */ +struct clk clk_fout_dpll = { + .name = "fout_dpll", + .id = -1, + .ctrlbit = (1 << 31), +}; + /* VPLL clock output */ struct clk clk_fout_vpll = { .name = "fout_vpll", @@ -122,6 +129,17 @@ struct clksrc_sources clk_src_epll = { .nr_sources = ARRAY_SIZE(clk_src_epll_list), }; +/* Possible clock sources for DPLL Mux */ +static struct clk *clk_src_dpll_list[] = { + [0] = &clk_fin_dpll, + [1] = &clk_fout_dpll, +}; + +struct clksrc_sources clk_src_dpll = { + .sources = clk_src_dpll_list, + .nr_sources = ARRAY_SIZE(clk_src_dpll_list), +}; + struct clk clk_vpll = { .name = "vpll", .id = -1, @@ -145,6 +163,7 @@ static struct clk *s5p_clks[] __initdata = { &clk_fout_apll, &clk_fout_mpll, &clk_fout_epll, + &clk_fout_dpll, &clk_fout_vpll, &clk_arm, &clk_vpll, |