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authorGrant Likely <grant.likely@secretlab.ca>2011-10-24 17:03:35 +0200
committerGrant Likely <grant.likely@secretlab.ca>2011-10-24 17:03:35 +0200
commit2bf6f675fa1a0f80b21aff20e6c21e87d6a7c9c9 (patch)
treeef49d741211dcc4f38636b5c422c9c346da09adf /arch/arm/plat-s5p/irq-gpioint.c
parent5762c20593b6b959f1470dc6f1ff4ca4d9570f8d (diff)
parentc3b92c8787367a8bb53d57d9789b558f1295cc96 (diff)
Merge commit 'v3.1' into devicetree/next
Diffstat (limited to 'arch/arm/plat-s5p/irq-gpioint.c')
-rw-r--r--arch/arm/plat-s5p/irq-gpioint.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index f88216d2399..c65eb791d1b 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -163,9 +163,9 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
ct->chip.irq_mask = irq_gc_mask_set_bit;
ct->chip.irq_unmask = irq_gc_mask_clr_bit;
ct->chip.irq_set_type = s5p_gpioint_set_type,
- ct->regs.ack = PEND_OFFSET + REG_OFFSET(chip->group);
- ct->regs.mask = MASK_OFFSET + REG_OFFSET(chip->group);
- ct->regs.type = CON_OFFSET + REG_OFFSET(chip->group);
+ ct->regs.ack = PEND_OFFSET + REG_OFFSET(group - bank->start);
+ ct->regs.mask = MASK_OFFSET + REG_OFFSET(group - bank->start);
+ ct->regs.type = CON_OFFSET + REG_OFFSET(group - bank->start);
irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio),
IRQ_GC_INIT_MASK_CACHE,
IRQ_NOREQUEST | IRQ_NOPROBE, 0);