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authorThomas Abraham <thomas.ab@samsung.com>2010-12-01 18:02:30 +0530
committerKukjin Kim <kgene.kim@samsung.com>2010-12-30 09:37:48 +0900
commit8233ab6aecf8c103504c3c3b1b055b2d9806fa3e (patch)
tree86b229e57e2f4d28267efa41f833d42589953d20 /arch/arm/plat-s5p
parentabc6c3602200a3b9268c9edece6ba2e85be7b2c4 (diff)
ARM: S5P: Add SROM bank 4 and 5 register offsets
Some of the S5P platforms like S5PC100 and S5PV210 include SROM banks 4 and 5 in addition to SROM banks 0 to 3. This patch adds register offsets for SROM bank 4 and 5. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s5p')
-rw-r--r--arch/arm/plat-s5p/include/plat/regs-srom.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/plat-s5p/include/plat/regs-srom.h b/arch/arm/plat-s5p/include/plat/regs-srom.h
index 06189dac87b..f121ab5e76c 100644
--- a/arch/arm/plat-s5p/include/plat/regs-srom.h
+++ b/arch/arm/plat-s5p/include/plat/regs-srom.h
@@ -22,6 +22,8 @@
#define S5P_SROM_BC1 S5P_SROMREG(0x8)
#define S5P_SROM_BC2 S5P_SROMREG(0xc)
#define S5P_SROM_BC3 S5P_SROMREG(0x10)
+#define S5P_SROM_BC4 S5P_SROMREG(0x14)
+#define S5P_SROM_BC5 S5P_SROMREG(0x18)
/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */