Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (224 commits)
  ARM: remove 'select GENERIC_TIME'
  ARM: 6136/1: ARCH_REQUIRE_GPIOLIB selects GENERIC_GPIO
  ARM: 6074/1: oprofile: convert from sysdev to platform device
  ARM: 6073/1: oprofile: remove old files and update KConfig
  ARM: 6072/1: oprofile: use perf-events framework as backend
  ARM: 6071/1: perf-events: allow modules to query the number of hardware counters
  ARM: 6070/1: perf-events: add support for xscale PMUs
  ARM: 6069/1: perf-events: use numeric ID to identify PMU
  ARM: 6064/1: pmu: register IRQs at runtime
  ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMA
  ARM: 6134/1: Handle instruction cache maintenance fault properly
  ARM: nwfpe: allow debugging output to be configured at runtime
  ARM: rename mach_cpu_disable() to platform_cpu_disable()
  ARM: 6132/1: PL330: Add common core driver
  ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310
  ARM: Move memory mapping into mmu.c
  ARM: Ensure meminfo is sorted prior to sanity_check_meminfo
  ARM: Remove useless linux/bootmem.h includes
  ARM: convert /proc/cpu/aligment to seq_file
  arm: use asm-generic/scatterlist.h
  ...

1 files changed, 11 insertions, 0 deletions

diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 29cd6a86cad..8d01e853df3 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -77,6 +77,17 @@ struct s3c_gpio_cfg {
  */
 extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
 
+/**
+ * s3c_gpio_getcfg - Read the current function for a GPIO pin
+ * @pin: The pin to read the configuration value for.
+ *
+ * Read the configuration state of the given @pin, returning a value that
+ * could be passed back to s3c_gpio_cfgpin().
+ *
+ * @sa s3c_gpio_cfgpin
+ */
+extern unsigned s3c_gpio_getcfg(unsigned int pin);
+
 /* Define values for the pull-{up,down} available for each gpio pin.
  *
  * These values control the state of the weak pull-{up,down} resistors