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| author | Robert Richter <robert.richter@amd.com> | 2010-10-11 19:26:50 +0200 |
|---|---|---|
| committer | Robert Richter <robert.richter@amd.com> | 2010-10-11 19:26:50 +0200 |
| commit | ad0f7cfaa85fc033523a09ab1f3dd6b8ded3dff5 (patch) | |
| tree | 2565121e4b9945d953e02c77a2e53065b3789aa4 /arch/arm/plat-samsung/include/plat/gpio-cfg.h | |
| parent | 86c8c04792f152c5469023885510140dd34817bc (diff) | |
| parent | c7a27aa4652c63172489a73f3961455650a79a7f (diff) | |
Merge branch 'oprofile/urgent' (early part) into oprofile/perf
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/gpio-cfg.h')
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-cfg.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index db4112c6f2b..1c6b92947c5 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -143,12 +143,12 @@ extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); /* Define values for the drvstr available for each gpio pin. * * These values control the value of the output signal driver strength, - * configurable on most pins on the S5C series. + * configurable on most pins on the S5P series. */ -#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x00) -#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x01) -#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x10) -#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x11) +#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0) +#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2) +#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1) +#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3) /** * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin |