diff options
| author | Eunki Kim <eunki_kim@samsung.com> | 2012-10-23 22:39:33 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-10-23 22:39:33 +0900 |
| commit | 453e2dd768de8aa82ee503f1d45395149aa357d6 (patch) | |
| tree | 7772efb06f4ef05a34e648350718f2cebf4b6ea7 /arch/arm/plat-samsung/s5p-irq-gpioint.c | |
| parent | 6f0c0580b70c89094b3422ba81118c7b959c7556 (diff) | |
ARM: SAMSUNG: Insert bitmap_gpio_int member in samsung_gpio_chip
When a device uses GPIO interrupt, its driver assumes that GPIO
should be INPUT mode. However, GPIO of SAMSUNG SoC is sepated to
INPUT mode and INTERRUPT mode. They are set by 0x0 and 0xF in GPIO
control register. If the register is set to INPUT mode, the
interrupt never occur. Therefore, it's necessary to set INTERRUPT
mode instead of INPUT mode when the pin is used for GPIO interrupt.
This patch inserts the bitmap_gpio_int member in struct samsung_
gpio_chip in order to represent use of GPIO interrupt for each pin
and sets the related bit when s5p_register_gpio_interrupt function
is called.
Signed-off-by: Eunki Kim <eunki_kim@samsung.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung/s5p-irq-gpioint.c')
| -rw-r--r-- | arch/arm/plat-samsung/s5p-irq-gpioint.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/plat-samsung/s5p-irq-gpioint.c b/arch/arm/plat-samsung/s5p-irq-gpioint.c index 23557d30e44..bae56131a50 100644 --- a/arch/arm/plat-samsung/s5p-irq-gpioint.c +++ b/arch/arm/plat-samsung/s5p-irq-gpioint.c @@ -185,7 +185,7 @@ int __init s5p_register_gpio_interrupt(int pin) /* check if the group has been already registered */ if (my_chip->irq_base) - return my_chip->irq_base + offset; + goto success; /* register gpio group */ ret = s5p_gpioint_add(my_chip); @@ -193,9 +193,13 @@ int __init s5p_register_gpio_interrupt(int pin) my_chip->chip.to_irq = samsung_gpiolib_to_irq; printk(KERN_INFO "Registered interrupt support for gpio group %d.\n", group); - return my_chip->irq_base + offset; + goto success; } return ret; +success: + my_chip->bitmap_gpio_int |= BIT(offset); + + return my_chip->irq_base + offset; } int __init s5p_register_gpioint_bank(int chain_irq, int start, int nr_groups) |