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| author | Vegard Nossum <vegard.nossum@gmail.com> | 2009-06-15 15:50:49 +0200 |
|---|---|---|
| committer | Vegard Nossum <vegard.nossum@gmail.com> | 2009-06-15 15:50:49 +0200 |
| commit | 722f2a6c87f34ee0fd0130a8cf45f81e0705594a (patch) | |
| tree | 50b054df34d2731eb0ba0cf1a6c27e43e7eed428 /arch/arm/plat-stmp3xxx/irq.c | |
| parent | 7a0aeb14e18ad59394bd9bbc6e57fb345819e748 (diff) | |
| parent | 45e3e1935e2857c54783291107d33323b3ef33c8 (diff) | |
Merge commit 'linus/master' into HEAD
Conflicts:
MAINTAINERS
Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
Diffstat (limited to 'arch/arm/plat-stmp3xxx/irq.c')
| -rw-r--r-- | arch/arm/plat-stmp3xxx/irq.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c new file mode 100644 index 00000000000..20de4e0401e --- /dev/null +++ b/arch/arm/plat-stmp3xxx/irq.c @@ -0,0 +1,51 @@ +/* + * Freescale STMP37XX/STMP378X common interrupt handling code + * + * Author: Vladislav Buzov <vbuzov@embeddedalley.com> + * + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/delay.h> +#include <linux/irq.h> +#include <linux/sysdev.h> + +#include <mach/stmp3xxx.h> +#include <mach/platform.h> +#include <mach/regs-icoll.h> + +void __init stmp3xxx_init_irq(struct irq_chip *chip) +{ + unsigned int i, lv; + + /* Reset the interrupt controller */ + stmp3xxx_reset_block(REGS_ICOLL_BASE + HW_ICOLL_CTRL, true); + + /* Disable all interrupts initially */ + for (i = 0; i < NR_REAL_IRQS; i++) { + chip->mask(i); + set_irq_chip(i, chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + + /* Ensure vector is cleared */ + for (lv = 0; lv < 4; lv++) + __raw_writel(1 << lv, REGS_ICOLL_BASE + HW_ICOLL_LEVELACK); + __raw_writel(0, REGS_ICOLL_BASE + HW_ICOLL_VECTOR); + + /* Barrier */ + (void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT); +} + |