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authorCatalin Marinas <catalin.marinas@arm.com>2012-03-05 11:49:30 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2012-09-17 13:42:06 +0100
commit08e875c16a16c950e1e6d85755df5f3440844675 (patch)
treee365ab8e1bfbfe855ee5f3cd98a1d2132aa43ff0 /arch/arm64/include/asm/hardirq.h
parent09b55412469dfe6797244dc5836c17ed0c2f191b (diff)
arm64: SMP support
This patch adds SMP initialisation and spinlocks implementation for AArch64. The spinlock support uses the new load-acquire/store-release instructions to avoid explicit barriers. The architecture also specifies that an event is automatically generated when clearing the exclusive monitor state to wake up processors in WFE, so there is no need for an explicit DSB/SEV instruction sequence. The SEVL instruction is used to set the exclusive monitor locally as there is no conditional WFE and a branch is more expensive. For the SMP booting protocol, see Documentation/arm64/booting.txt. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/include/asm/hardirq.h')
-rw-r--r--arch/arm64/include/asm/hardirq.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/hardirq.h b/arch/arm64/include/asm/hardirq.h
index c6c95145c17..507546353d6 100644
--- a/arch/arm64/include/asm/hardirq.h
+++ b/arch/arm64/include/asm/hardirq.h
@@ -20,8 +20,13 @@
#include <linux/threads.h>
#include <asm/irq.h>
+#define NR_IPI 4
+
typedef struct {
unsigned int __softirq_pending;
+#ifdef CONFIG_SMP
+ unsigned int ipi_irqs[NR_IPI];
+#endif
} ____cacheline_aligned irq_cpustat_t;
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */