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authorWill Deacon <will.deacon@arm.com>2013-08-20 11:47:42 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2013-08-20 12:12:25 +0100
commit178cd9ce377232518ec17ff2ecab2e80fa60784c (patch)
tree43a24b93b0d76eab7ab6c493b173266cd78318a0 /arch/arm64
parent8455e6ec70f33b0e8c3ffd47067e00481f09f454 (diff)
arm64: perf: fix ARMv8 EVTYPE_MASK to include NSH bit
This is a port of f2fe09b055e2 ("ARM: 7663/1: perf: fix ARMv7 EVTYPE_MASK to include NSH bit") to arm64, which fixes the broken evtype mask to include the NSH bit, allowing profiling at EL2. Cc: <stable@vger.kernel.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/kernel/perf_event.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 2a1e9163d67..cea1594ff93 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -784,7 +784,7 @@ static const unsigned armv8_pmuv3_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
/*
* PMXEVTYPER: Event selection reg
*/
-#define ARMV8_EVTYPE_MASK 0xc00000ff /* Mask for writable bits */
+#define ARMV8_EVTYPE_MASK 0xc80000ff /* Mask for writable bits */
#define ARMV8_EVTYPE_EVENT 0xff /* Mask for EVENT bits */
/*