diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-10-16 00:09:02 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-10-29 11:01:08 +0000 |
| commit | f3964fe1c9d9a887d65faf594669852e4dec46e0 (patch) | |
| tree | 6afdb712b386012efec9e317677ebfea9c192369 /arch/arm | |
| parent | e812a3c15f0299ba70f0f7b5710db2a1a1c6643b (diff) | |
ARM: sa11x0/assabet: ensure CS2 is configured appropriately
The CS2 region contains the Assabet board configuration and status
registers, which are 32-bit. Unfortunately, some boot loaders do not
configure this region correctly, leaving it setup as a 16-bit region.
Fix this.
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-sa1100/assabet.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index e838ba27e44..c9808c68415 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -512,6 +512,9 @@ static void __init assabet_map_io(void) * Its called GPCLKR0 in my SA1110 manual. */ Ser1SDCR0 |= SDCR0_SUS; + MSC1 = (MSC1 & ~0xffff) | + MSC_NonBrst | MSC_32BitStMem | + MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0); if (!machine_has_neponset()) sa1100_register_uart_fns(&assabet_port_fns); |