diff options
| author | Dave Jiang <dave.jiang@gmail.com> | 2005-11-04 17:15:44 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-11-04 17:15:44 +0000 |
| commit | 7866f6492856dde7d70e4f878e3893e1f91216ce (patch) | |
| tree | 0b63ebe5c257c98ed52bc7f86508829b2d7102f4 /arch/arm | |
| parent | 73f0f7c79b046dc5d6b56a3f145430d97d50f877 (diff) | |
[ARM] 3086/1: ixp2xxx error irq handling
Patch from Dave Jiang
This provides support for IXP2xxx error interrupt handling. Previously there was a patch to remove this (although the original stuff was broken). Well, now the error bits are needed again. These are used extensively by the micro-engine drivers according to Deepak and also we will need it for the new EDAC code that Alan Cox is trying to push into the main kernel.
Re-submit of 3072/1, generated against git tree pulled today. AFAICT, this git tree pulled in all the ARM changes that's in arm.diff. Please let me know if there are additional changes. Thx!
Signed-off-by: Dave Jiang <djiang@mvista.com>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-ixp2000/core.c | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index c93a98b2a32..df140962bb0 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -402,6 +402,40 @@ static void ixp2000_pci_irq_unmask(unsigned int irq) ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 27))); } +/* + * Error interrupts. These are used extensively by the microengine drivers + */ +static void ixp2000_err_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) +{ + int i; + unsigned long status = *IXP2000_IRQ_ERR_STATUS; + + for(i = 31; i >= 0; i--) { + if(status & (1 << i)) { + desc = irq_desc + IRQ_IXP2000_DRAM0_MIN_ERR + i; + desc->handle(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc, regs); + } + } +} + +static void ixp2000_err_irq_mask(unsigned int irq) +{ + ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_CLR, + (1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR))); +} + +static void ixp2000_err_irq_unmask(unsigned int irq) +{ + ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_SET, + (1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR))); +} + +static struct irqchip ixp2000_err_irq_chip = { + .ack = ixp2000_err_irq_mask, + .mask = ixp2000_err_irq_mask, + .unmask = ixp2000_err_irq_unmask +}; + static struct irqchip ixp2000_pci_irq_chip = { .ack = ixp2000_pci_irq_mask, .mask = ixp2000_pci_irq_mask, @@ -459,6 +493,18 @@ void __init ixp2000_init_irq(void) } else set_irq_flags(irq, 0); } + for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) { + if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) & + IXP2000_VALID_ERR_IRQ_MASK) { + set_irq_chip(irq, &ixp2000_err_irq_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID); + } + else + set_irq_flags(irq, 0); + } + set_irq_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler); + /* * GPIO IRQs are invalid until someone sets the interrupt mode * by calling set_irq_type(). |