diff options
| author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2013-04-24 11:41:21 +0200 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-06-17 16:04:16 +0800 |
| commit | d0cae684e5c06ff5220e84f6fb9b82e0c4e6efd5 (patch) | |
| tree | 61c4d446f9231691c4e4d5969faaa3ed143b3732 /arch/arm | |
| parent | bb6e2fa3f511060c1d22e97b8df1de27e39cfdb3 (diff) | |
ARM: i.MX53: add csi pinctrl
Add a group to the csi pinctrl.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/imx53.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 1e8a9782371..de42463b944 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -364,6 +364,22 @@ MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1d5 >; }; + + pinctrl_csi_2: csigrp-2 { + fsl,pins = < + MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC 0x1d5 + MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC 0x1d5 + MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1d5 + MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 0x1d5 + MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 0x1d5 + MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 0x1d5 + MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 0x1d5 + MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 0x1d5 + MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 0x1d5 + MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 0x1d5 + MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 0x1d5 + >; + }; }; cspi { |