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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-04-13 18:57:29 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-06-02 09:20:11 +0100
commitb4b20ad881f5a5c19ae9199547ddbb00fa4825eb (patch)
treee493f9f397590561e452a7eee1aa83e2fa8c0d28 /arch/arm
parent4585eaff634b1bbb09686895221b3645f53f7a60 (diff)
ARM: provide common method to clear bits in CPU control register
Several places open-code this manipulation, let's consolidate this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mm/alignment.c5
-rw-r--r--arch/arm/mm/init.c10
-rw-r--r--arch/arm/mm/mm.h4
-rw-r--r--arch/arm/mm/mmu.c10
4 files changed, 20 insertions, 9 deletions
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 1ab611ce500..53e268fcae4 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -28,6 +28,7 @@
#include <asm/opcodes.h>
#include "fault.h"
+#include "mm.h"
/*
* 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998
@@ -968,9 +969,7 @@ static int __init alignment_init(void)
#ifdef CONFIG_CPU_CP15
if (cpu_is_v6_unaligned()) {
- cr_alignment &= ~CR_A;
- cr_no_alignment &= ~CR_A;
- set_cr(cr_alignment);
+ set_cr(__clear_cr(CR_A));
ai_usermode = safe_usermode(ai_usermode, false);
}
#endif
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 2a77ba8796a..94332b1ad4b 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -23,6 +23,7 @@
#include <linux/dma-contiguous.h>
#include <linux/sizes.h>
+#include <asm/cp15.h>
#include <asm/mach-types.h>
#include <asm/memblock.h>
#include <asm/prom.h>
@@ -36,6 +37,15 @@
#include "mm.h"
+#ifdef CONFIG_CPU_CP15_MMU
+unsigned long __init __clear_cr(unsigned long mask)
+{
+ cr_no_alignment = cr_no_alignment & ~mask;
+ cr_alignment = cr_alignment & ~mask;
+ return cr_alignment;
+}
+#endif
+
static phys_addr_t phys_initrd_start __initdata = 0;
static unsigned long phys_initrd_size __initdata = 0;
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 7ea641b7aa7..ce727d47275 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -2,6 +2,8 @@
#include <linux/list.h>
#include <linux/vmalloc.h>
+#include <asm/pgtable.h>
+
/* the upper-most page table pointer */
extern pmd_t *top_pmd;
@@ -93,3 +95,5 @@ extern phys_addr_t arm_lowmem_limit;
void __init bootmem_init(void);
void arm_mm_memblock_reserve(void);
void dma_contiguous_remap(void);
+
+unsigned long __clear_cr(unsigned long mask);
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index b68c6b22e1c..d97cb2d8953 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -125,6 +125,7 @@ static struct cachepolicy cache_policies[] __initdata = {
*/
static int __init early_cachepolicy(char *p)
{
+ unsigned long cr = get_cr();
int i;
for (i = 0; i < ARRAY_SIZE(cache_policies); i++) {
@@ -132,8 +133,7 @@ static int __init early_cachepolicy(char *p)
if (memcmp(p, cache_policies[i].policy, len) == 0) {
cachepolicy = i;
- cr_alignment &= ~cache_policies[i].cr_mask;
- cr_no_alignment &= ~cache_policies[i].cr_mask;
+ cr = __clear_cr(cache_policies[i].cr_mask);
break;
}
}
@@ -151,7 +151,7 @@ static int __init early_cachepolicy(char *p)
cachepolicy = CPOLICY_WRITEBACK;
}
flush_cache_all();
- set_cr(cr_alignment);
+ set_cr(cr);
return 0;
}
early_param("cachepolicy", early_cachepolicy);
@@ -188,9 +188,7 @@ early_param("ecc", early_ecc);
static int __init noalign_setup(char *__unused)
{
- cr_alignment &= ~CR_A;
- cr_no_alignment &= ~CR_A;
- set_cr(cr_alignment);
+ set_cr(__clear_cr(CR_A));
return 1;
}
__setup("noalign", noalign_setup);