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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2013-05-15 12:12:33 +0200
committerNicolas Ferre <nicolas.ferre@atmel.com>2013-05-15 12:37:45 +0200
commitb7a8ca5173ef9aa55fa039d7c216426ff0b25a12 (patch)
tree41010eebef7f8a1727af490561ced96205fdde5c /arch/arm
parent3f81127293284da449942a0144b9747c5db1e523 (diff)
ARM: at91: rm9200 fix time support
since commit 838a2ae80a6ab52139fb1bf0a93ea8c5eff94488 Author: Shawn Guo <shawn.guo@linaro.org> Date: Sat Jan 12 11:50:05 2013 +0000 ARM: use clockevents_config_and_register() where possible The timer is wrongly configured and result in a nice crash so revert it on rm9200 timer. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: stable <stable@vger.kernel.org> # 3.8+ Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 2acdff4c1df..180b3024bec 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,6 +174,7 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
static struct clock_event_device clkevt = {
.name = "at91_tick",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+ .shift = 32,
.rating = 150,
.set_next_event = clkevt32k_next_event,
.set_mode = clkevt32k_mode,
@@ -264,9 +265,11 @@ void __init at91rm9200_timer_init(void)
at91_st_write(AT91_ST_RTMR, 1);
/* Setup timer clockevent, with minimum of two ticks (important!!) */
+ clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
+ clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
+ clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
clkevt.cpumask = cpumask_of(0);
- clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
- 2, AT91_ST_ALMV);
+ clockevents_register_device(&clkevt);
/* register clocksource */
clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);