diff options
| author | Igor Grinberg <grinberg@compulab.co.il> | 2010-04-07 11:40:37 +0300 |
|---|---|---|
| committer | Eric Miao <eric.y.miao@gmail.com> | 2010-05-06 11:12:10 +0800 |
| commit | d5df767dbe4bc1e7ce1bd16976f78ef938e53052 (patch) | |
| tree | be4f2a8d511b92405023fbdace3e21e593ff85db /arch/arm | |
| parent | 01bf0b64579ead8a82e7cfc32ae44bc667e7ad0f (diff) | |
[ARM] pxa: add missing new line to regs-u2d.h
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-u2d.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/include/mach/regs-u2d.h b/arch/arm/mach-pxa/include/mach/regs-u2d.h index 44b0b20b69a..c15c0c57de0 100644 --- a/arch/arm/mach-pxa/include/mach/regs-u2d.h +++ b/arch/arm/mach-pxa/include/mach/regs-u2d.h @@ -166,7 +166,8 @@ #define U2DMACSR_BUSERRTYPE (7 << 10) /* PX Bus Error Type */ #define U2DMACSR_EORINTR (1 << 9) /* End Of Receive */ #define U2DMACSR_REQPEND (1 << 8) /* Request Pending */ -#define U2DMACSR_RASINTR (1 << 4) /* Request After Channel Stopped (read / write 1 clear) */#define U2DMACSR_STOPINTR (1 << 3) /* Stop Interrupt (read only) */ +#define U2DMACSR_RASINTR (1 << 4) /* Request After Channel Stopped (read / write 1 clear) */ +#define U2DMACSR_STOPINTR (1 << 3) /* Stop Interrupt (read only) */ #define U2DMACSR_ENDINTR (1 << 2) /* End Interrupt (read / write 1 clear) */ #define U2DMACSR_STARTINTR (1 << 1) /* Start Interrupt (read / write 1 clear) */ #define U2DMACSR_BUSERRINTR (1 << 0) /* Bus Error Interrupt (read / write 1 clear) */ |