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authorAndrew Victor <linux@maxim.org.za>2008-04-02 21:58:00 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-04-04 09:52:25 +0100
commite5f40bfaf309ec4cc27b717d48fb0824313e5ef8 (patch)
treea35c3051d900708487b5f2ffc6c44304c6f0db61 /arch/arm
parent4fd9212cb9bad88ec7c8bf5313f53331905f957a (diff)
[ARM] 4909/1: [AT91] Timer/Counter Block platform_devices
Register platform_devices for the Timer/Counter Block peripherals found on the AT91RM9200, SAM9 & CAP9 processors. Original patch from David Brownell. Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c38
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c85
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c85
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c50
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c38
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c50
6 files changed, 346 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 7d782ee4117..2eeaf5d5bbf 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -537,6 +537,43 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
/* --------------------------------------------------------------------
+ * Timer/Counter block
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb_resources[] = {
+ [0] = {
+ .start = AT91CAP9_BASE_TCB0,
+ .end = AT91CAP9_BASE_TCB0 + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91CAP9_ID_TCB,
+ .end = AT91CAP9_ID_TCB,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91cap9_tcb_device = {
+ .name = "atmel_tcb",
+ .id = 0,
+ .resource = tcb_resources,
+ .num_resources = ARRAY_SIZE(tcb_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+ /* this chip has one clock and irq for all three TC channels */
+ at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk");
+ platform_device_register(&at91cap9_tcb_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
+/* --------------------------------------------------------------------
* RTT
* -------------------------------------------------------------------- */
@@ -1074,6 +1111,7 @@ static int __init at91_add_standard_devices(void)
{
at91_add_device_rtt();
at91_add_device_watchdog();
+ at91_add_device_tc();
return 0;
}
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index ef6aeb86e98..70d3a001853 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -577,6 +577,90 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
/* --------------------------------------------------------------------
+ * Timer/Counter blocks
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb0_resources[] = {
+ [0] = {
+ .start = AT91RM9200_BASE_TCB0,
+ .end = AT91RM9200_BASE_TCB0 + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91RM9200_ID_TC0,
+ .end = AT91RM9200_ID_TC0,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = AT91RM9200_ID_TC1,
+ .end = AT91RM9200_ID_TC1,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = AT91RM9200_ID_TC2,
+ .end = AT91RM9200_ID_TC2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91rm9200_tcb0_device = {
+ .name = "atmel_tcb",
+ .id = 0,
+ .resource = tcb0_resources,
+ .num_resources = ARRAY_SIZE(tcb0_resources),
+};
+
+static struct resource tcb1_resources[] = {
+ [0] = {
+ .start = AT91RM9200_BASE_TCB1,
+ .end = AT91RM9200_BASE_TCB1 + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91RM9200_ID_TC3,
+ .end = AT91RM9200_ID_TC3,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = AT91RM9200_ID_TC4,
+ .end = AT91RM9200_ID_TC4,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = AT91RM9200_ID_TC5,
+ .end = AT91RM9200_ID_TC5,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91rm9200_tcb1_device = {
+ .name = "atmel_tcb",
+ .id = 1,
+ .resource = tcb1_resources,
+ .num_resources = ARRAY_SIZE(tcb1_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+ /* this chip has a separate clock and irq for each TC channel */
+ at91_clock_associate("tc0_clk", &at91rm9200_tcb0_device.dev, "t0_clk");
+ at91_clock_associate("tc1_clk", &at91rm9200_tcb0_device.dev, "t1_clk");
+ at91_clock_associate("tc2_clk", &at91rm9200_tcb0_device.dev, "t2_clk");
+ platform_device_register(&at91rm9200_tcb0_device);
+
+ at91_clock_associate("tc3_clk", &at91rm9200_tcb1_device.dev, "t0_clk");
+ at91_clock_associate("tc4_clk", &at91rm9200_tcb1_device.dev, "t1_clk");
+ at91_clock_associate("tc5_clk", &at91rm9200_tcb1_device.dev, "t2_clk");
+ platform_device_register(&at91rm9200_tcb1_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
+/* --------------------------------------------------------------------
* RTC
* -------------------------------------------------------------------- */
@@ -1141,6 +1225,7 @@ static int __init at91_add_standard_devices(void)
{
at91_add_device_rtc();
at91_add_device_watchdog();
+ at91_add_device_tc();
return 0;
}
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index f20afe4d156..20ac09c0231 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -545,6 +545,90 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
/* --------------------------------------------------------------------
+ * Timer/Counter blocks
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb0_resources[] = {
+ [0] = {
+ .start = AT91SAM9260_BASE_TCB0,
+ .end = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91SAM9260_ID_TC0,
+ .end = AT91SAM9260_ID_TC0,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = AT91SAM9260_ID_TC1,
+ .end = AT91SAM9260_ID_TC1,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = AT91SAM9260_ID_TC2,
+ .end = AT91SAM9260_ID_TC2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91sam9260_tcb0_device = {
+ .name = "atmel_tcb",
+ .id = 0,
+ .resource = tcb0_resources,
+ .num_resources = ARRAY_SIZE(tcb0_resources),
+};
+
+static struct resource tcb1_resources[] = {
+ [0] = {
+ .start = AT91SAM9260_BASE_TCB1,
+ .end = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91SAM9260_ID_TC3,
+ .end = AT91SAM9260_ID_TC3,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = AT91SAM9260_ID_TC4,
+ .end = AT91SAM9260_ID_TC4,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = AT91SAM9260_ID_TC5,
+ .end = AT91SAM9260_ID_TC5,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91sam9260_tcb1_device = {
+ .name = "atmel_tcb",
+ .id = 1,
+ .resource = tcb1_resources,
+ .num_resources = ARRAY_SIZE(tcb1_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+ /* this chip has a separate clock and irq for each TC channel */
+ at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
+ at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
+ at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
+ platform_device_register(&at91sam9260_tcb0_device);
+
+ at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
+ at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
+ at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
+ platform_device_register(&at91sam9260_tcb1_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
+/* --------------------------------------------------------------------
* RTT
* -------------------------------------------------------------------- */
@@ -1108,6 +1192,7 @@ static int __init at91_add_standard_devices(void)
{
at91_add_device_rtt();
at91_add_device_watchdog();
+ at91_add_device_tc();
return 0;
}
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 0bd0edf8fa3..03cd32482ea 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -548,6 +548,55 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
/* --------------------------------------------------------------------
+ * Timer/Counter block
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb_resources[] = {
+ [0] = {
+ .start = AT91SAM9261_BASE_TCB0,
+ .end = AT91SAM9261_BASE_TCB0 + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91SAM9261_ID_TC0,
+ .end = AT91SAM9261_ID_TC0,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = AT91SAM9261_ID_TC1,
+ .end = AT91SAM9261_ID_TC1,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = AT91SAM9261_ID_TC2,
+ .end = AT91SAM9261_ID_TC2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91sam9261_tcb_device = {
+ .name = "atmel_tcb",
+ .id = 0,
+ .resource = tcb_resources,
+ .num_resources = ARRAY_SIZE(tcb_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+ /* this chip has a separate clock and irq for each TC channel */
+ at91_clock_associate("tc0_clk", &at91sam9261_tcb_device.dev, "t0_clk");
+ at91_clock_associate("tc1_clk", &at91sam9261_tcb_device.dev, "t1_clk");
+ at91_clock_associate("tc2_clk", &at91sam9261_tcb_device.dev, "t2_clk");
+ platform_device_register(&at91sam9261_tcb_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
+/* --------------------------------------------------------------------
* RTT
* -------------------------------------------------------------------- */
@@ -1050,6 +1099,7 @@ static int __init at91_add_standard_devices(void)
{
at91_add_device_rtt();
at91_add_device_watchdog();
+ at91_add_device_tc();
return 0;
}
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 64aab9c9b97..c81842c0270 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -788,6 +788,43 @@ void __init at91_add_device_isi(void) {}
/* --------------------------------------------------------------------
+ * Timer/Counter block
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb_resources[] = {
+ [0] = {
+ .start = AT91SAM9263_BASE_TCB0,
+ .end = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91SAM9263_ID_TCB,
+ .end = AT91SAM9263_ID_TCB,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91sam9263_tcb_device = {
+ .name = "atmel_tcb",
+ .id = 0,
+ .resource = tcb_resources,
+ .num_resources = ARRAY_SIZE(tcb_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+ /* this chip has one clock and irq for all three TC channels */
+ at91_clock_associate("tcb_clk", &at91sam9263_tcb_device.dev, "t0_clk");
+ platform_device_register(&at91sam9263_tcb_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
+/* --------------------------------------------------------------------
* RTT
* -------------------------------------------------------------------- */
@@ -1262,6 +1299,7 @@ static int __init at91_add_standard_devices(void)
{
at91_add_device_rtt();
at91_add_device_watchdog();
+ at91_add_device_tc();
return 0;
}
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 8982b02c8b4..892262a71d0 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -390,6 +390,55 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
/* --------------------------------------------------------------------
+ * Timer/Counter block
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb_resources[] = {
+ [0] = {
+ .start = AT91SAM9RL_BASE_TCB0,
+ .end = AT91SAM9RL_BASE_TCB0 + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91SAM9RL_ID_TC0,
+ .end = AT91SAM9RL_ID_TC0,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = AT91SAM9RL_ID_TC1,
+ .end = AT91SAM9RL_ID_TC1,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = AT91SAM9RL_ID_TC2,
+ .end = AT91SAM9RL_ID_TC2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91sam9rl_tcb_device = {
+ .name = "atmel_tcb",
+ .id = 0,
+ .resource = tcb_resources,
+ .num_resources = ARRAY_SIZE(tcb_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+ /* this chip has a separate clock and irq for each TC channel */
+ at91_clock_associate("tc0_clk", &at91sam9rl_tcb_device.dev, "t0_clk");
+ at91_clock_associate("tc1_clk", &at91sam9rl_tcb_device.dev, "t1_clk");
+ at91_clock_associate("tc2_clk", &at91sam9rl_tcb_device.dev, "t2_clk");
+ platform_device_register(&at91sam9rl_tcb_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
+/* --------------------------------------------------------------------
* RTC
* -------------------------------------------------------------------- */
@@ -930,6 +979,7 @@ static int __init at91_add_standard_devices(void)
at91_add_device_rtc();
at91_add_device_rtt();
at91_add_device_watchdog();
+ at91_add_device_tc();
return 0;
}