diff options
| author | Lauri Hintsala <lauri.hintsala@bluegiga.com> | 2012-07-10 10:08:08 +0300 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2012-07-11 12:17:10 +0800 |
| commit | d8bb823d31a1405e42aa4a2162d3c00e657b6516 (patch) | |
| tree | 6fd009d1bf5dd3ef554365c46728fdb3f6b6a54a /arch/arm | |
| parent | 3317d99e444988e71a32edbca092b1aed098c2f1 (diff) | |
ARM: apx4devkit: add display support
Add HannStar display and device tree configuration.
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/apx4devkit.dts | 21 | ||||
| -rw-r--r-- | arch/arm/mach-mxs/mach-mxs.c | 24 |
2 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/apx4devkit.dts b/arch/arm/boot/dts/apx4devkit.dts index 51ed36a6413..03de5b87a36 100644 --- a/arch/arm/boot/dts/apx4devkit.dts +++ b/arch/arm/boot/dts/apx4devkit.dts @@ -35,11 +35,32 @@ reg = <0>; fsl,pinmux-ids = < 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ + 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ >; fsl,drive-strength = <0>; fsl,voltage = <1>; fsl,pull-up = <0>; }; + + lcdif_pins_apx4: lcdif-apx4@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + }; + + lcdif@80030000 { + pinctrl-names = "default"; + pinctrl-0 = <&lcdif_24bit_pins_a + &lcdif_pins_apx4>; + status = "okay"; }; }; diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index bd8db7b21e6..648bdd05d38 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -78,6 +78,25 @@ static struct fb_videomode m28evk_video_modes[] = { }, }; +static struct fb_videomode apx4devkit_video_modes[] = { + { + .name = "HannStar PJ70112A", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 33333, /* picosecond (30.00 MHz) */ + .left_margin = 88, + .right_margin = 40, + .upper_margin = 32, + .lower_margin = 13, + .hsync_len = 48, + .vsync_len = 3, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | + FB_SYNC_DATA_ENABLE_HIGH_ACT | + FB_SYNC_DOTCLK_FAILING_ACT, + }, +}; + static struct mxsfb_platform_data mxsfb_pdata __initdata; static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { @@ -248,6 +267,11 @@ static void __init apx4devkit_init(void) if (IS_BUILTIN(CONFIG_PHYLIB)) phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK, apx4devkit_phy_fixup); + + mxsfb_pdata.mode_list = apx4devkit_video_modes; + mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes); + mxsfb_pdata.default_bpp = 32; + mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; } static void __init mxs_machine_init(void) |