diff options
| author | Alexander Shiyan <shc_work@mail.ru> | 2012-08-21 20:59:34 +0400 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-09-28 21:14:07 +0200 |
| commit | 7255f87a7169689be2d4722375744a1f932d4b28 (patch) | |
| tree | 2b3e5f54e62ebdaa04cbb0199a1becddfb6c9b4e /arch/arm | |
| parent | 61ae48c3cb6bcffd1c7e18164c3d103eb62f06aa (diff) | |
ARM: clps711x: Fix lowlevel debug-macro
CTS signal can not be used for the port and tied to any logic state.
In this case we have an infinite loop waiting for the signal. For fix
this problem, checking CTS removed, waiting for the signal "busy" was
postponed after the byte write to the port.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-clps711x/include/mach/debug-macro.S | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S index 118b3d93057..cb3684f8dae 100644 --- a/arch/arm/mach-clps711x/include/mach/debug-macro.S +++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S @@ -28,17 +28,11 @@ .endm .macro waituart,rd,rx -1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx - tst \rd, #1 << 11 @ UBUSYx - bne 1001b .endm .macro busyuart,rd,rx - tst \rx, #0x1000 @ UART2 does not have CTS here - bne 1002f 1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx - tst \rd, #1 << 8 @ CTS + tst \rd, #1 << 11 @ UBUSYx bne 1001b -1002: .endm |