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authorLinus Torvalds <torvalds@linux-foundation.org>2009-04-05 11:15:28 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-04-05 11:15:28 -0700
commit87fc94d54b639d8c39fc4a11db0e142f84096e13 (patch)
tree00ea5cdb108c93f621110424d8c54ef5dac12960 /arch/avr32/boards/atngw100/evklcd10x.c
parent3516c6a8dc0b1153c611c4cf0dc4a51631f052bb (diff)
parent8e706c4d0dab214c625a2df84a0ca69a76bae65d (diff)
Merge branch 'avr32-arch' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6
* 'avr32-arch' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6: avr32: add hardware handshake support to atmel_serial avr32: add RTS/CTS/CLK pin selection for the USARTs Add RTC support for Merisc boards avr32: at32ap700x: setup DMA for AC97C in the machine code avr32: at32ap700x: setup DMA for ABDAC in the machine code Add Merisc board support avr32: use gpio_is_valid() to check USBA vbus_pin I/O line atmel-usba-udc: use gpio_is_valid() to check vbus_pin I/O line avr32: fix timing LCD parameters for EVKLCD10X boards avr32: use GPIO line PB15 on EVKLCD10x boards for backlight avr32: configure MCI detect and write protect pins for EVKLCD10x boards avr32: set pin mask to alternative 18 bpp for EVKLCD10x boards avr32: add pin mask for 18-bit color on the LCD controller avr32: fix 15-bit LCDC pin mask to use MSB lines
Diffstat (limited to 'arch/avr32/boards/atngw100/evklcd10x.c')
-rw-r--r--arch/avr32/boards/atngw100/evklcd10x.c50
1 files changed, 34 insertions, 16 deletions
diff --git a/arch/avr32/boards/atngw100/evklcd10x.c b/arch/avr32/boards/atngw100/evklcd10x.c
index 8140b22b346..00337112c5a 100644
--- a/arch/avr32/boards/atngw100/evklcd10x.c
+++ b/arch/avr32/boards/atngw100/evklcd10x.c
@@ -11,6 +11,7 @@
#include <linux/init.h>
#include <linux/linkage.h>
+#include <linux/gpio.h>
#include <linux/fb.h>
#include <linux/platform_device.h>
@@ -19,26 +20,26 @@
#include <asm/setup.h>
#include <mach/at32ap700x.h>
+#include <mach/portmux.h>
#include <mach/board.h>
+#include <sound/atmel-ac97c.h>
+
static struct ac97c_platform_data __initdata ac97c0_data = {
- .dma_rx_periph_id = 3,
- .dma_tx_periph_id = 4,
- .dma_controller_id = 0,
- .reset_pin = GPIO_PIN_PB(19),
+ .reset_pin = GPIO_PIN_PB(19),
};
#ifdef CONFIG_BOARD_ATNGW100_EVKLCD10X_VGA
static struct fb_videomode __initdata tcg057vglad_modes[] = {
{
- .name = "640x480 @ 60",
- .refresh = 60,
+ .name = "640x480 @ 50",
+ .refresh = 50,
.xres = 640, .yres = 480,
.pixclock = KHZ2PICOS(25180),
- .left_margin = 64, .right_margin = 31,
- .upper_margin = 34, .lower_margin = 2,
- .hsync_len = 96, .vsync_len = 4,
+ .left_margin = 64, .right_margin = 96,
+ .upper_margin = 34, .lower_margin = 11,
+ .hsync_len = 64, .vsync_len = 15,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
@@ -69,14 +70,14 @@ static struct atmel_lcdfb_info __initdata atevklcd10x_lcdc_data = {
#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA
static struct fb_videomode __initdata tcg057qvlad_modes[] = {
{
- .name = "320x240 @ 60",
- .refresh = 60,
+ .name = "320x240 @ 50",
+ .refresh = 50,
.xres = 320, .yres = 240,
.pixclock = KHZ2PICOS(6300),
- .left_margin = 52, .right_margin = 28,
- .upper_margin = 7, .lower_margin = 2,
- .hsync_len = 96, .vsync_len = 4,
+ .left_margin = 34, .right_margin = 46,
+ .upper_margin = 7, .lower_margin = 15,
+ .hsync_len = 64, .vsync_len = 12,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
@@ -144,12 +145,29 @@ static struct atmel_lcdfb_info __initdata atevklcd10x_lcdc_data = {
};
#endif
+static void atevklcd10x_lcdc_power_control(int on)
+{
+ gpio_set_value(GPIO_PIN_PB(15), on);
+}
+
static int __init atevklcd10x_init(void)
{
- at32_add_device_ac97c(0, &ac97c0_data);
+ /* PB15 is connected to the enable line on the boost regulator
+ * controlling the backlight for the LCD panel.
+ */
+ at32_select_gpio(GPIO_PIN_PB(15), AT32_GPIOF_OUTPUT);
+ gpio_request(GPIO_PIN_PB(15), "backlight");
+ gpio_direction_output(GPIO_PIN_PB(15), 0);
+
+ atevklcd10x_lcdc_data.atmel_lcdfb_power_control =
+ atevklcd10x_lcdc_power_control;
at32_add_device_lcdc(0, &atevklcd10x_lcdc_data,
- fbmem_start, fbmem_size, 1);
+ fbmem_start, fbmem_size,
+ ATMEL_LCDC_ALT_18BIT | ATMEL_LCDC_PE_DVAL);
+
+ at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH);
+
return 0;
}
postcore_initcall(atevklcd10x_init);