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authorPeter Ma <pma@mediamatech.com>2009-03-31 10:31:02 -0700
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2009-04-01 16:13:45 +0200
commitbf4861cf3e7df123c0c62f00ae2c301c292f669c (patch)
tree916a73a6597b06e719f6f96a499fb0bcaa44a5b6 /arch/avr32/mach-at32ap/at32ap700x.c
parenta6b6b5ff8f31960f760dd849beb70e1ae8ddc0e2 (diff)
avr32: add RTS/CTS/CLK pin selection for the USARTs
Adds extra parameter to AT32 at32_map_usart(), so as to reserve RTS/CTS/CLK pins. All boards under arch/avr32/boards have been updated (trivial change), but not all have been tested. Signed-off-by: Peter Ma <pma@mediamatech.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32/mach-at32ap/at32ap700x.c')
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c30
1 files changed, 21 insertions, 9 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 62501d64322..7cc65379832 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -966,56 +966,68 @@ static struct resource atmel_usart3_resource[] = {
DEFINE_DEV_DATA(atmel_usart, 3);
DEV_CLK(usart, atmel_usart3, pba, 6);
-static inline void configure_usart0_pins(void)
+static inline void configure_usart0_pins(int flags)
{
u32 pin_mask = (1 << 8) | (1 << 9); /* RXD & TXD */
+ if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 6);
+ if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 7);
+ if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 10);
select_peripheral(PIOA, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
}
-static inline void configure_usart1_pins(void)
+static inline void configure_usart1_pins(int flags)
{
u32 pin_mask = (1 << 17) | (1 << 18); /* RXD & TXD */
+ if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 19);
+ if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 20);
+ if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 16);
select_peripheral(PIOA, pin_mask, PERIPH_A, AT32_GPIOF_PULLUP);
}
-static inline void configure_usart2_pins(void)
+static inline void configure_usart2_pins(int flags)
{
u32 pin_mask = (1 << 26) | (1 << 27); /* RXD & TXD */
+ if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 30);
+ if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 29);
+ if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 28);
select_peripheral(PIOB, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
}
-static inline void configure_usart3_pins(void)
+static inline void configure_usart3_pins(int flags)
{
u32 pin_mask = (1 << 18) | (1 << 17); /* RXD & TXD */
+ if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 16);
+ if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 15);
+ if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 19);
select_peripheral(PIOB, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
}
static struct platform_device *__initdata at32_usarts[4];
-void __init at32_map_usart(unsigned int hw_id, unsigned int line)
+void __init at32_map_usart(unsigned int hw_id, unsigned int line, int flags)
{
struct platform_device *pdev;
switch (hw_id) {
case 0:
pdev = &atmel_usart0_device;
- configure_usart0_pins();
+ configure_usart0_pins(flags);
break;
case 1:
pdev = &atmel_usart1_device;
- configure_usart1_pins();
+ configure_usart1_pins(flags);
break;
case 2:
pdev = &atmel_usart2_device;
- configure_usart2_pins();
+ configure_usart2_pins(flags);
break;
case 3:
pdev = &atmel_usart3_device;
- configure_usart3_pins();
+ configure_usart3_pins(flags);
break;
default:
return;