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authorLinus Torvalds <torvalds@linux-foundation.org>2009-06-12 13:14:30 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-12 13:14:30 -0700
commit2b10dc45d15150434d7f206264e912eacbff734b (patch)
treefc0ec778fbb563a62e573ad1ec76428ce1223c01 /arch/blackfin/include/asm/cplb.h
parent47ea421af7479b90c481c94826f1c716fcf672cf (diff)
parentbf664c0a3a42683b78d74aca2d7cfb6ccc2aa2c3 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (62 commits) Blackfin: fix sparseirq/kstat_irqs fallout Blackfin: fix unused warnings after nommu update Blackfin: export the last exception cause via debugfs Blackfin: fix length checking in kgdb_ebin2mem Blackfin: kgdb: fix up error return values Blackfin: push access_ok() L1 attribute down Blackfin: punt duplicated search_exception_table() prototype Blackfin: add missing access_ok() checks to user functions Blackfin: convert early_printk EVT init to a loop Blackfin: document the lsl variants of the L1 allocator Blackfin: rename Blackfin relocs according to the toolchain Blackfin: check SIC defines rather than variant names Blackfin: add SSYNC to set_dma_sg() for descriptor fetching Blackfin: convert SMP to only use generic time framework Blackfin: bf548-ezkit/bf537-stamp: add resources for ADXL345/346 Blackfin: override default uClinux MTD addr/size Blackfin: fix command line corruption with DEBUG_DOUBLEFAULT Blackfin: fix handling of initial L1 reservation Blackfin: merge sram init functions Blackfin: drop unused reserve_pda() function ...
Diffstat (limited to 'arch/blackfin/include/asm/cplb.h')
-rw-r--r--arch/blackfin/include/asm/cplb.h35
1 files changed, 19 insertions, 16 deletions
diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h
index ad566ff9ad1..a75a6a9f094 100644
--- a/arch/blackfin/include/asm/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
@@ -53,29 +53,32 @@
#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON)
#endif
+#define SDRAM_DNON_CHBL (CPLB_COMMON)
+#define SDRAM_EBIU (CPLB_COMMON)
+#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
+
#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
#ifdef CONFIG_SMP
-#define L2_ATTR (INITIAL_T | I_CPLB | D_CPLB)
-#define L2_IMEMORY (CPLB_COMMON | CPLB_LOCK)
-#define L2_DMEMORY (CPLB_COMMON | CPLB_LOCK)
+#define L2_ATTR (INITIAL_T | I_CPLB | D_CPLB)
+#define L2_IMEMORY (CPLB_COMMON)
+#define L2_DMEMORY (CPLB_LOCK | CPLB_COMMON)
#else
-#ifdef CONFIG_BFIN_L2_CACHEABLE
-#define L2_IMEMORY (SDRAM_IGENERIC)
-#define L2_DMEMORY (SDRAM_DGENERIC)
-#else
-#define L2_IMEMORY (CPLB_COMMON)
-#define L2_DMEMORY (CPLB_COMMON)
-#endif /* CONFIG_BFIN_L2_CACHEABLE */
-
-#define L2_ATTR (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB)
+#define L2_ATTR (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB)
+#define L2_IMEMORY (SDRAM_IGENERIC)
+
+# if defined(CONFIG_BFIN_L2_WB)
+# define L2_DMEMORY (CPLB_L1_CHBL | CPLB_COMMON)
+# elif defined(CONFIG_BFIN_L2_WT)
+# define L2_DMEMORY (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON)
+# elif defined(CONFIG_BFIN_L2_NOT_CACHED)
+# define L2_DMEMORY (CPLB_COMMON)
+# else
+# define L2_DMEMORY (0)
+# endif
#endif /* CONFIG_SMP */
-#define SDRAM_DNON_CHBL (CPLB_COMMON)
-#define SDRAM_EBIU (CPLB_COMMON)
-#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
-
#define SIZE_1K 0x00000400 /* 1K */
#define SIZE_4K 0x00001000 /* 4K */
#define SIZE_1M 0x00100000 /* 1M */