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| author | Ingo Molnar <mingo@elte.hu> | 2008-06-23 11:53:03 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-06-23 11:53:03 +0200 |
| commit | 009b9fc98ddd83f9139fdabb12c0d7a8535d5421 (patch) | |
| tree | f7d3e182407d2ebe50a9b8db6361ac910027a1cf /arch/blackfin/lib/ins.S | |
| parent | 3711ccb07b7f0a13f4f1aa16a8fdca9c930f21ca (diff) | |
| parent | 481c5346d0981940ee63037eb53e4e37b0735c10 (diff) | |
Merge branch 'linus' into x86/threadinfo
Diffstat (limited to 'arch/blackfin/lib/ins.S')
| -rw-r--r-- | arch/blackfin/lib/ins.S | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/arch/blackfin/lib/ins.S b/arch/blackfin/lib/ins.S index df7b8833a0c..eba2343b1b5 100644 --- a/arch/blackfin/lib/ins.S +++ b/arch/blackfin/lib/ins.S @@ -7,7 +7,7 @@ * Description: Implementation of ins{bwl} for BlackFin processors using zero overhead loops. * * Modified: - * Copyright 2004-2006 Analog Devices Inc. + * Copyright 2004-2008 Analog Devices Inc. * Copyright (C) 2005 Bas Vermeulen, BuyWays BV <bas@buyways.nl> * * Bugs: Enter bugs at http://blackfin.uclinux.org/ @@ -63,6 +63,23 @@ ENTRY(_insw) RTS; ENDPROC(_insw) +ENTRY(_insw_8) + P0 = R0; /* P0 = port */ + cli R3; + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + SSYNC; + LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2; +.Lword8_loop_s: R0 = W[P0]; + B[P1++] = R0; + R0 = R0 >> 8; + B[P1++] = R0; + NOP; +.Lword8_loop_e: NOP; + sti R3; + RTS; +ENDPROC(_insw_8) + ENTRY(_insb) P0 = R0; /* P0 = port */ cli R3; @@ -78,8 +95,6 @@ ENTRY(_insb) RTS; ENDPROC(_insb) - - ENTRY(_insl_16) P0 = R0; /* P0 = port */ cli R3; |