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| author | Jonathan Corbet <corbet@lwn.net> | 2008-07-14 15:29:34 -0600 |
|---|---|---|
| committer | Jonathan Corbet <corbet@lwn.net> | 2008-07-14 15:29:34 -0600 |
| commit | 2fceef397f9880b212a74c418290ce69e7ac00eb (patch) | |
| tree | d9cc09ab992825ef7fede4a688103503e3caf655 /arch/blackfin/lib/outs.S | |
| parent | feae1ef116ed381625d3731c5ae4f4ebcb3fa302 (diff) | |
| parent | bce7f793daec3e65ec5c5705d2457b81fe7b5725 (diff) | |
Merge commit 'v2.6.26' into bkl-removal
Diffstat (limited to 'arch/blackfin/lib/outs.S')
| -rw-r--r-- | arch/blackfin/lib/outs.S | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S index 4c3da8ae094..4685b7aa008 100644 --- a/arch/blackfin/lib/outs.S +++ b/arch/blackfin/lib/outs.S @@ -7,7 +7,7 @@ * Description: Implementation of outs{bwl} for BlackFin processors using zero overhead loops. * * Modified: Copyright (C) 2005 Bas Vermeulen, BuyWays BV <bas@buyways.nl> - * Copyright 2004-2006 Analog Devices Inc. + * Copyright 2004-2008 Analog Devices Inc. * * Bugs: Enter bugs at http://blackfin.uclinux.org/ * @@ -63,3 +63,17 @@ ENTRY(_outsb) .Lbyte_loop_e: B[P0] = R0; RTS; ENDPROC(_outsb) + +ENTRY(_outsw_8) + P0 = R0; /* P0 = port */ + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + + LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2; +.Lword8_loop_s: R1 = B[P1++]; + R0 = B[P1++]; + R0 = R0 << 8; + R0 = R0 + R1; +.Lword8_loop_e: W[P0] = R0; + RTS; +ENDPROC(_outsw_8) |