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authorMichael Hennerich <michael.hennerich@analog.com>2008-11-18 17:48:22 +0800
committerBryan Wu <cooloney@kernel.org>2008-11-18 17:48:22 +0800
commitdc26aec25d1a4e2690df166dbe843344728994ce (patch)
tree36717399eff88602af964f9f80814f9210698d95 /arch/blackfin/mach-bf538/Kconfig
parentf940260a980a1ad7570dfd7a4b73c6ad2207f738 (diff)
Blackfin arch: BF538/9 Linux kernel Support
Add supporing for Blackfin BF538 and BF539 processors. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf538/Kconfig')
-rw-r--r--arch/blackfin/mach-bf538/Kconfig164
1 files changed, 164 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf538/Kconfig b/arch/blackfin/mach-bf538/Kconfig
new file mode 100644
index 00000000000..a6f3307758c
--- /dev/null
+++ b/arch/blackfin/mach-bf538/Kconfig
@@ -0,0 +1,164 @@
+if (BF538 || BF539)
+
+source "arch/blackfin/mach-bf538/boards/Kconfig"
+
+menu "BF538 Specific Configuration"
+
+comment "Interrupt Priority Assignment"
+menu "Priority"
+
+config IRQ_PLL_WAKEUP
+ int "IRQ_PLL_WAKEUP"
+ default 7
+config IRQ_DMA0_ERROR
+ int "IRQ_DMA0_ERROR"
+ default 7
+config IRQ_PPI_ERROR
+ int "IRQ_PPI_ERROR"
+ default 7
+config IRQ_SPORT0_ERROR
+ int "IRQ_SPORT0_ERROR"
+ default 7
+config IRQ_SPORT1_ERROR
+ int "IRQ_SPORT1_ERROR"
+ default 7
+config IRQ_SPI0_ERROR
+ int "IRQ_SPI0_ERROR"
+ default 7
+config IRQ_UART0_ERROR
+ int "IRQ_UART0_ERROR"
+ default 7
+config IRQ_RTC
+ int "IRQ_RTC"
+ default 8
+config IRQ_PPI
+ int "IRQ_PPI"
+ default 8
+config IRQ_SPORT0_RX
+ int "IRQ_SPORT0_RX"
+ default 9
+config IRQ_SPORT0_TX
+ int "IRQ_SPORT0_TX"
+ default 9
+config IRQ_SPORT1_RX
+ int "IRQ_SPORT1_RX"
+ default 9
+config IRQ_SPORT1_TX
+ int "IRQ_SPORT1_TX"
+ default 9
+config IRQ_SPI0
+ int "IRQ_SPI0"
+ default 10
+config IRQ_UART0_RX
+ int "IRQ_UART0_RX"
+ default 10
+config IRQ_UART0_TX
+ int "IRQ_UART0_TX"
+ default 10
+config IRQ_TMR0
+ int "IRQ_TMR0"
+ default 11
+config IRQ_TMR1
+ int "IRQ_TMR1"
+ default 11
+config IRQ_TMR2
+ int "IRQ_TMR2"
+ default 11
+config IRQ_PORTF_INTA
+ int "IRQ_PORTF_INTA"
+ default 12
+config IRQ_PORTF_INTB
+ int "IRQ_PORTF_INTB"
+ default 12
+config IRQ_MEM0_DMA0
+ int "IRQ_MEM0_DMA0"
+ default 13
+config IRQ_MEM0_DMA1
+ int "IRQ_MEM0_DMA1"
+ default 13
+config IRQ_WATCH
+ int "IRQ_WATCH"
+ default 13
+config IRQ_DMA1_ERROR
+ int "IRQ_DMA1_ERROR"
+ default 7
+config IRQ_SPORT2_ERROR
+ int "IRQ_SPORT2_ERROR"
+ default 7
+config IRQ_SPORT3_ERROR
+ int "IRQ_SPORT3_ERROR"
+ default 7
+config IRQ_SPI1_ERROR
+ int "IRQ_SPI1_ERROR"
+ default 7
+config IRQ_SPI2_ERROR
+ int "IRQ_SPI2_ERROR"
+ default 7
+config IRQ_UART1_ERROR
+ int "IRQ_UART1_ERROR"
+ default 7
+config IRQ_UART2_ERROR
+ int "IRQ_UART2_ERROR"
+ default 7
+config IRQ_CAN_ERROR
+ int "IRQ_CAN_ERROR"
+ default 7
+config IRQ_SPORT2_RX
+ int "IRQ_SPORT2_RX"
+ default 9
+config IRQ_SPORT2_TX
+ int "IRQ_SPORT2_TX"
+ default 9
+config IRQ_SPORT3_RX
+ int "IRQ_SPORT3_RX"
+ default 9
+config IRQ_SPORT3_TX
+ int "IRQ_SPORT3_TX"
+ default 9
+config IRQ_SPI1
+ int "IRQ_SPI1"
+ default 10
+config IRQ_SPI2
+ int "IRQ_SPI2"
+ default 10
+config IRQ_UART1_RX
+ int "IRQ_UART1_RX"
+ default 10
+config IRQ_UART1_TX
+ int "IRQ_UART1_TX"
+ default 10
+config IRQ_UART2_RX
+ int "IRQ_UART2_RX"
+ default 10
+config IRQ_UART2_TX
+ int "IRQ_UART2_TX"
+ default 10
+config IRQ_TWI0
+ int "IRQ_TWI0"
+ default 11
+config IRQ_TWI1
+ int "IRQ_TWI1"
+ default 11
+config IRQ_CAN_RX
+ int "IRQ_CAN_RX"
+ default 11
+config IRQ_CAN_TX
+ int "IRQ_CAN_TX"
+ default 11
+config IRQ_MEM1_DMA0
+ int "IRQ_MEM1_DMA0"
+ default 13
+config IRQ_MEM1_DMA1
+ int "IRQ_MEM1_DMA1"
+ default 13
+
+ help
+ Enter the priority numbers between 7-13 ONLY. Others are Reserved.
+ This applies to all the above. It is not recommended to assign the
+ highest priority number 7 to UART or any other device.
+
+endmenu
+
+endmenu
+
+endif