diff options
| author | Yi Li <yi.li@analog.com> | 2009-01-07 23:14:39 +0800 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2009-01-07 23:14:39 +0800 |
| commit | 6a01f230339321292cf065551f8cf55361052461 (patch) | |
| tree | 7ac2ac8fc9f05a7315ef6a7f6f0a387433c62c14 /arch/blackfin/mach-bf538/include/mach/irq.h | |
| parent | 5105432a3201e3f0e6c219cd0a74feee1e5e262b (diff) | |
Blackfin arch: merge adeos blackfin part to arch/blackfin/
[Mike Frysinger <vapier.adi@gmail.com>:
- handle bf531/bf532/bf534/bf536 variants in ipipe.h
- cleanup IPIPE logic for bfin_set_irq_handler()
- cleanup ipipe asm code a bit and add missing ENDPROC()
- simplify IPIPE code in trap_c
- unify some of the IPIPE code and fix style
- simplify DO_IRQ_L1 handling with ipipe code
- revert IRQ_SW_INT# addition from ipipe merge
- remove duplicate get_{c,s}clk() prototypes
]
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf538/include/mach/irq.h')
| -rw-r--r-- | arch/blackfin/mach-bf538/include/mach/irq.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/irq.h b/arch/blackfin/mach-bf538/include/mach/irq.h index 60bdac4cb6a..fdc87fe2c17 100644 --- a/arch/blackfin/mach-bf538/include/mach/irq.h +++ b/arch/blackfin/mach-bf538/include/mach/irq.h @@ -81,9 +81,9 @@ #define IRQ_SPI0 BFIN_IRQ(13) /* DMA 5 Channel (SPI0) */ #define IRQ_UART0_RX BFIN_IRQ(14) /* DMA 6 Channel (UART0 RX) */ #define IRQ_UART0_TX BFIN_IRQ(15) /* DMA 7 Channel (UART0 TX) */ -#define IRQ_TMR0 BFIN_IRQ(16) /* Timer 0 */ -#define IRQ_TMR1 BFIN_IRQ(17) /* Timer 1 */ -#define IRQ_TMR2 BFIN_IRQ(18) /* Timer 2 */ +#define IRQ_TIMER0 BFIN_IRQ(16) /* Timer 0 */ +#define IRQ_TIMER1 BFIN_IRQ(17) /* Timer 1 */ +#define IRQ_TIMER2 BFIN_IRQ(18) /* Timer 2 */ #define IRQ_PORTF_INTA BFIN_IRQ(19) /* Port F Interrupt A */ #define IRQ_PORTF_INTB BFIN_IRQ(20) /* Port F Interrupt B */ #define IRQ_MEM0_DMA0 BFIN_IRQ(21) /* MDMA0 Stream 0 */ @@ -168,9 +168,9 @@ #define IRQ_UART0_TX_POS 28 /* IAR2 BIT FIELDS */ -#define IRQ_TMR0_POS 0 -#define IRQ_TMR1_POS 4 -#define IRQ_TMR2_POS 8 +#define IRQ_TIMER0_POS 0 +#define IRQ_TIMER1_POS 4 +#define IRQ_TIMER2_POS 8 #define IRQ_PORTF_INTA_POS 12 #define IRQ_PORTF_INTB_POS 16 #define IRQ_MEM0_DMA0_POS 20 |