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authorLinus Torvalds <torvalds@linux-foundation.org>2010-08-09 21:01:11 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-08-09 21:01:11 -0700
commit0fc2f137226eff4c9dd90864dda5c237474c3ec5 (patch)
tree50ec67f1f9d144a3ceb5ccff45a37bc5005f6c3d /arch/blackfin/mach-bf561/include/mach/gpio.h
parentdcded10f6dce10411b16134ce9cc87bfdf75c13f (diff)
parentaab2393e2ec52c74b419af7c26a12e21584e483b (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (32 commits) Blackfin: gpio: add a debounce stub Blackfin: update defconfigs Blackfin: remove CONFIG_MEM_GENERIC_BOARD Blackfin: dpmc: punt unnecessary RTC_ISTAT clearing Blackfin: unify rotary encoder bitmasks Blackfin: unify SDH/RSI bitmasks Blackfin: BF54x: tweak DMAC MMR naming to match other ports Blackfin: TWI: clean up the MMR names Blackfin: add EVT_OVERRIDE/IPRIO core MMR helpers Blackfin: add support for dynamic ftrace Blackfin: add support for LZO compressed kernels Blackfin: portmux: fix peripheral map overflow when requesting pins Blackfin: document SPI CS limitations with CPHA=0 Blackfin: remove useless and outdated documentation Blackfin: BF51x/BF52x: support GPIO Hysteresis/Schmitt Trigger options Blackfin: gpio/portmux: clean up whitespace corruption Blackfin: make sure mmiowb inserts a write barrier with SSYNC Blackfin: fix DMA/cache bug when resuming from suspend to RAM Blackfin: BF51x: fix handling of PH8 (the "internal" SPI0SEL4 pin) Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CS ...
Diffstat (limited to 'arch/blackfin/mach-bf561/include/mach/gpio.h')
-rw-r--r--arch/blackfin/mach-bf561/include/mach/gpio.h96
1 files changed, 48 insertions, 48 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/gpio.h b/arch/blackfin/mach-bf561/include/mach/gpio.h
index a651a8cf805..4f8aa5d0880 100644
--- a/arch/blackfin/mach-bf561/include/mach/gpio.h
+++ b/arch/blackfin/mach-bf561/include/mach/gpio.h
@@ -9,54 +9,54 @@
#define MAX_BLACKFIN_GPIOS 48
-#define GPIO_PF0 0
-#define GPIO_PF1 1
-#define GPIO_PF2 2
-#define GPIO_PF3 3
-#define GPIO_PF4 4
-#define GPIO_PF5 5
-#define GPIO_PF6 6
-#define GPIO_PF7 7
-#define GPIO_PF8 8
-#define GPIO_PF9 9
-#define GPIO_PF10 10
-#define GPIO_PF11 11
-#define GPIO_PF12 12
-#define GPIO_PF13 13
-#define GPIO_PF14 14
-#define GPIO_PF15 15
-#define GPIO_PF16 16
-#define GPIO_PF17 17
-#define GPIO_PF18 18
-#define GPIO_PF19 19
-#define GPIO_PF20 20
-#define GPIO_PF21 21
-#define GPIO_PF22 22
-#define GPIO_PF23 23
-#define GPIO_PF24 24
-#define GPIO_PF25 25
-#define GPIO_PF26 26
-#define GPIO_PF27 27
-#define GPIO_PF28 28
-#define GPIO_PF29 29
-#define GPIO_PF30 30
-#define GPIO_PF31 31
-#define GPIO_PF32 32
-#define GPIO_PF33 33
-#define GPIO_PF34 34
-#define GPIO_PF35 35
-#define GPIO_PF36 36
-#define GPIO_PF37 37
-#define GPIO_PF38 38
-#define GPIO_PF39 39
-#define GPIO_PF40 40
-#define GPIO_PF41 41
-#define GPIO_PF42 42
-#define GPIO_PF43 43
-#define GPIO_PF44 44
-#define GPIO_PF45 45
-#define GPIO_PF46 46
-#define GPIO_PF47 47
+#define GPIO_PF0 0
+#define GPIO_PF1 1
+#define GPIO_PF2 2
+#define GPIO_PF3 3
+#define GPIO_PF4 4
+#define GPIO_PF5 5
+#define GPIO_PF6 6
+#define GPIO_PF7 7
+#define GPIO_PF8 8
+#define GPIO_PF9 9
+#define GPIO_PF10 10
+#define GPIO_PF11 11
+#define GPIO_PF12 12
+#define GPIO_PF13 13
+#define GPIO_PF14 14
+#define GPIO_PF15 15
+#define GPIO_PF16 16
+#define GPIO_PF17 17
+#define GPIO_PF18 18
+#define GPIO_PF19 19
+#define GPIO_PF20 20
+#define GPIO_PF21 21
+#define GPIO_PF22 22
+#define GPIO_PF23 23
+#define GPIO_PF24 24
+#define GPIO_PF25 25
+#define GPIO_PF26 26
+#define GPIO_PF27 27
+#define GPIO_PF28 28
+#define GPIO_PF29 29
+#define GPIO_PF30 30
+#define GPIO_PF31 31
+#define GPIO_PF32 32
+#define GPIO_PF33 33
+#define GPIO_PF34 34
+#define GPIO_PF35 35
+#define GPIO_PF36 36
+#define GPIO_PF37 37
+#define GPIO_PF38 38
+#define GPIO_PF39 39
+#define GPIO_PF40 40
+#define GPIO_PF41 41
+#define GPIO_PF42 42
+#define GPIO_PF43 43
+#define GPIO_PF44 44
+#define GPIO_PF45 45
+#define GPIO_PF46 46
+#define GPIO_PF47 47
#define PORT_FIO0 GPIO_0
#define PORT_FIO1 GPIO_16