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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-10 17:06:08 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-10 17:06:08 -0800 |
commit | 0be8c8bd1de21d75ef14eb6af35b664f70a35746 (patch) | |
tree | fac1d514dcdb4146d4504f965a7f394c998c6b82 /arch/blackfin/mach-bf561/smp.c | |
parent | e54be894eae10eca9892e965cc9532f5d5a11767 (diff) | |
parent | a780c6e86851c6479851186c5d5b9fb2b201bec7 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (52 commits)
Blackfin: encode cpu-rev into uImage name
Blackfin: bf54x: don't ack GPIO ints when unmasking them
Blackfin: sram_free_with_lsl: do not ignore return value of sram_free
Blackfin: boards: add missing "static" to peripheral lists
Blackfin: DNP5370: new board port
Blackfin: bf518f-ezbrd: fix dsa resources
Blackfin: move "-m elf32bfin" to general LDFLAGS
Blackfin: kgdb_test: make sure to initialize num2
Blackfin: kgdb: disable preempt schedule when running single step in kgdb
Blackfin: kgdb: disable interrupt when single stepping in ADEOS
Blackfin: SMP: kgdb: apply anomaly 257 work around
Blackfin: fix building IPIPE code when XIP is enabled
Blackfin: SMP: kgdb: flush core internal write buffer before flushinv
Blackfin: sport_uart resources: remove unused secondary RX/TX pins
Blackfin: tll6527m: fix spelling in unused code (struct name)
Blackfin: bf527-ezkit: add adau1373 chip address
Blackfin: no-mpu: fix masking of small uncached dma region
Blackfin: pm: drop irq save/restore in standby and suspend to mem callback
MAINTAINERS: update Analog Devices support info
Blackfin: dpmc.h: pull in new pll.h
...
Diffstat (limited to 'arch/blackfin/mach-bf561/smp.c')
-rw-r--r-- | arch/blackfin/mach-bf561/smp.c | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c index f540ed1257d..1074a7ef81c 100644 --- a/arch/blackfin/mach-bf561/smp.c +++ b/arch/blackfin/mach-bf561/smp.c @@ -86,12 +86,12 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle spin_lock(&boot_lock); - if ((bfin_read_SIC_SYSCR() & COREB_SRAM_INIT) == 0) { + if ((bfin_read_SYSCR() & COREB_SRAM_INIT) == 0) { /* CoreB already running, sending ipi to wakeup it */ platform_send_ipi_cpu(cpu, IRQ_SUPPLE_0); } else { /* Kick CoreB, which should start execution from CORE_SRAM_BASE. */ - bfin_write_SIC_SYSCR(bfin_read_SIC_SYSCR() & ~COREB_SRAM_INIT); + bfin_write_SYSCR(bfin_read_SYSCR() & ~COREB_SRAM_INIT); SSYNC(); } @@ -111,41 +111,46 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle panic("CPU%u: processor failed to boot\n", cpu); } -void __init platform_request_ipi(irq_handler_t handler) +static const char supple0[] = "IRQ_SUPPLE_0"; +static const char supple1[] = "IRQ_SUPPLE_1"; +void __init platform_request_ipi(int irq, void *handler) { int ret; + const char *name = (irq == IRQ_SUPPLE_0) ? supple0 : supple1; - ret = request_irq(IRQ_SUPPLE_0, handler, IRQF_DISABLED, - "Supplemental Interrupt0", handler); + ret = request_irq(irq, handler, IRQF_DISABLED | IRQF_PERCPU, name, handler); if (ret) - panic("Cannot request supplemental interrupt 0 for IPI service"); + panic("Cannot request %s for IPI service", name); } -void platform_send_ipi(cpumask_t callmap) +void platform_send_ipi(cpumask_t callmap, int irq) { unsigned int cpu; + int offset = (irq == IRQ_SUPPLE_0) ? 6 : 8; for_each_cpu_mask(cpu, callmap) { BUG_ON(cpu >= 2); SSYNC(); - bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (6 + cpu))); + bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (offset + cpu))); SSYNC(); } } -void platform_send_ipi_cpu(unsigned int cpu) +void platform_send_ipi_cpu(unsigned int cpu, int irq) { + int offset = (irq == IRQ_SUPPLE_0) ? 6 : 8; BUG_ON(cpu >= 2); SSYNC(); - bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (6 + cpu))); + bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (offset + cpu))); SSYNC(); } -void platform_clear_ipi(unsigned int cpu) +void platform_clear_ipi(unsigned int cpu, int irq) { + int offset = (irq == IRQ_SUPPLE_0) ? 10 : 12; BUG_ON(cpu >= 2); SSYNC(); - bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + cpu))); + bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (offset + cpu))); SSYNC(); } |