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author | Ingo Molnar <mingo@elte.hu> | 2009-03-26 18:29:40 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-03-26 18:29:40 +0100 |
commit | 5a54bd1307471c1cd0521402fe65e2057edcab2f (patch) | |
tree | 25fb6a543db4ccc11b6d5662ed2e7facfce39ae7 /arch/blackfin/mach-common/clocks-init.c | |
parent | f9f35677d81adb0feedcd6e0e661784805c8facd (diff) | |
parent | 8e0ee43bc2c3e19db56a4adaa9a9b04ce885cd84 (diff) |
Merge commit 'v2.6.29' into core/header-fixes
Diffstat (limited to 'arch/blackfin/mach-common/clocks-init.c')
-rw-r--r-- | arch/blackfin/mach-common/clocks-init.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c index 5d182abefc7..35393651359 100644 --- a/arch/blackfin/mach-common/clocks-init.c +++ b/arch/blackfin/mach-common/clocks-init.c @@ -14,9 +14,10 @@ #include <asm/clocks.h> #include <asm/mem_init.h> +#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */ #define PLL_CTL_VAL \ (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \ - (PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0)) + (PLL_BYPASS << 8) | (ANOMALY_05000305 ? 0 : 0x8000)) __attribute__((l1_text)) static void do_sync(void) @@ -76,7 +77,7 @@ void init_clocks(void) bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV); #ifdef EBIU_SDGCTL bfin_write_EBIU_SDRRC(mem_SDRRC); - bfin_write_EBIU_SDGCTL(mem_SDGCTL); + bfin_write_EBIU_SDGCTL((bfin_read_EBIU_SDGCTL() & SDGCTL_WIDTH) | mem_SDGCTL); #else bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() & ~(SRREQ)); do_sync(); |