Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (56 commits)
  Blackfin arch: fix bug when enable uart1 with uart0 disabled => no initial console
  Blackfin arch: split apart dump_bfin_regs and merge/remove show_regs from process.c, which was largely duplicated
  Blackfin arch: use common __INIT/__FINIT defines rather than setting the .section ourselves to .init.text
  Blackfin arch: fix bug when sending signals with the wrong PC, cause gdb get confused
  Blackfin arch: Ensure we printk out strings with the proper loglevel
  Blackfin arch: Need to specify ax with the .init.text section,
  Blackfin arch: Update Kconfig to latest Blackfin silicon datasheets
  Blackfin arch: update defconfig files
  Blackfin arch: Fix typo, and add ENDPROC - no functional changes
  Blackfin arch: convert READY to DMA_READY as it causes build errors in common sound code otherwise
  Blackfin arch: add defines for the on-chip L1 ROM of BF54x
  Blackfin arch: cplb and map header file cleanup
  Blackfin arch: cleanup the cplb declares
  Blackfin arch: fix broken on BF52x, remove silly checks on processors for L1_SCRATCH defines
  Blackfin arch: add support for working around anomaly 05000312
  Blackfin arch: cleanup BF54x header file and add BF547 definition
  Blackfin arch: fix building for BF542 processors which only have 1 TWI
  Blackfin arch: rename _return_from_exception to _bfin_return_from_exception and export it
  Blackfin arch: move EXPORT_SYMBOL() to C files where the symbol is actually defined
  Blackfin arch: fix bug NOR Flash MTD mount fail
  ...

1 files changed, 18 insertions, 7 deletions

diff --git a/arch/blackfin/mach-common/cplbmgr.S b/arch/blackfin/mach-common/cplbmgr.S
index 946703ef48f..6f909cbfac7 100644
--- a/arch/blackfin/mach-common/cplbmgr.S
+++ b/arch/blackfin/mach-common/cplbmgr.S
@@ -73,7 +73,7 @@ ENTRY(_cplb_mgr)
 	/* ICPLB Miss Exception. We need to choose one of the
 	* currently-installed CPLBs, and replace it with one
 	* from the configuration table.
- 	*/
+	*/
 
 	P4.L = LO(ICPLB_FAULT_ADDR);
 	P4.H = HI(ICPLB_FAULT_ADDR);
@@ -222,7 +222,7 @@ ENTRY(_cplb_mgr)
 
 	/* See if failed address > start address */
 	CC = R4 <= R0(IU);
- 	IF !CC JUMP .Linext;
+	IF !CC JUMP .Linext;
 
 	/* extract page size (17:16)*/
 	R3 = EXTRACT(R2, R1.L) (Z);
@@ -271,16 +271,27 @@ ENTRY(_cplb_mgr)
 
 /* FAILED CASES*/
 .Lno_page_in_table:
-	( R7:4,P5:3 ) = [SP++];
 	R0 = CPLB_NO_ADDR_MATCH;
-	RTS;
+	JUMP .Lfail_ret;
+
 .Lall_locked:
-	( R7:4,P5:3 ) = [SP++];
 	R0 = CPLB_NO_UNLOCKED;
-	RTS;
+	JUMP .Lfail_ret;
+
 .Lprot_violation:
-	( R7:4,P5:3 ) = [SP++];
 	R0 = CPLB_PROT_VIOL;
+
+.Lfail_ret:
+	/* Make sure we turn protection/cache back on, even in the failing case */
+	BITSET(R5,ENICPLB_P);
+	CLI R2;
+	SSYNC;          /* SSYNC required before writing to IMEM_CONTROL. */
+	.align 8;
+	[P4] = R5;
+	SSYNC;
+	STI R2;
+
+	( R7:4,P5:3 ) = [SP++];
 	RTS;
 
 .Ldcplb_write: