diff options
author | Michael Hennerich <michael.hennerich@analog.com> | 2008-08-13 17:41:13 +0800 |
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committer | Bryan Wu <cooloney@kernel.org> | 2008-08-13 17:41:13 +0800 |
commit | 55546ac45dfb4087437bedaed43400630c96680e (patch) | |
tree | 6c1d1a055e880b3aecf6e85bd6883740b34df1aa /arch/blackfin/mach-common/ints-priority.c | |
parent | d3d0ac23a308f92fc5e5e2846ca40e7bffa5cec3 (diff) |
Blackfin arch: workaround SIC_IWR1 reset bug, by keeping MDMA0/1 always enabled in SIC_IWR1.
This way we ensure that reboot succeeds.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-common/ints-priority.c')
-rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 4271ef3f201..7f9df4ee734 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -1069,7 +1069,16 @@ int __init init_arch_irq(void) #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) bfin_write_SIC_IWR0(IWR_DISABLE_ALL); +#if defined(CONFIG_BF52x) + /* BF52x system reset does not properly reset SIC_IWR1 which + * will screw up the bootrom as it relies on MDMA0/1 waking it + * up from IDLE instructions. See this report for more info: + * http://blackfin.uclinux.org/gf/tracker/4323 + */ + bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); +#else bfin_write_SIC_IWR1(IWR_DISABLE_ALL); +#endif # ifdef CONFIG_BF54x bfin_write_SIC_IWR2(IWR_DISABLE_ALL); # endif |