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authorRobin Getz <robin.getz@analog.com>2007-06-21 11:34:16 +0800
committerBryan Wu <bryan.wu@analog.com>2007-06-21 11:34:16 +0800
commit4bf3f3cbb6add01d3e6a18c73f594b73113b14f2 (patch)
treea80839f98a64052f4d004a5207da2731fe556908 /arch/blackfin/mach-common
parent0864a4e201b1ea442f4c8b887418a29f67e24d30 (diff)
Blackfin arch: update ANOMALY handling
update lists for 533, 537, and add SSYNC workaround into assembly files. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/mach-common')
-rw-r--r--arch/blackfin/mach-common/cache.S20
-rw-r--r--arch/blackfin/mach-common/interrupt.S2
2 files changed, 11 insertions, 11 deletions
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index 8bd2af1935b..7063795eb7c 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -123,14 +123,14 @@ ENTRY(_blackfin_icache_flush_range)
R2 = R0 & R2;
P0 = R2;
P1 = R1;
- CSYNC;
+ CSYNC(R3);
IFLUSH [P0];
1:
IFLUSH [P0++];
CC = P0 < P1 (iu);
IF CC JUMP 1b (bp);
IFLUSH [P0];
- SSYNC;
+ SSYNC(R3);
RTS;
ENDPROC(_blackfin_icache_flush_range)
@@ -148,7 +148,7 @@ ENTRY(_blackfin_icache_dcache_flush_range)
R2 = R0 & R2;
P0 = R2;
P1 = R1;
- CSYNC;
+ CSYNC(R3);
IFLUSH [P0];
1:
FLUSH [P0];
@@ -157,7 +157,7 @@ ENTRY(_blackfin_icache_dcache_flush_range)
IF CC JUMP 1b (bp);
IFLUSH [P0];
FLUSH [P0];
- SSYNC;
+ SSYNC(R3);
RTS;
ENDPROC(_blackfin_icache_dcache_flush_range)
@@ -174,7 +174,7 @@ ENTRY(_blackfin_dcache_invalidate_range)
R2 = R0 & R2;
P0 = R2;
P1 = R1;
- CSYNC;
+ CSYNC(R3);
FLUSHINV[P0];
1:
FLUSHINV[P0++];
@@ -186,7 +186,7 @@ ENTRY(_blackfin_dcache_invalidate_range)
* so do one more.
*/
FLUSHINV[P0];
- SSYNC;
+ SSYNC(R3);
RTS;
ENDPROC(_blackfin_dcache_invalidate_range)
@@ -235,7 +235,7 @@ ENTRY(_blackfin_dcache_flush_range)
R2 = R0 & R2;
P0 = R2;
P1 = R1;
- CSYNC;
+ CSYNC(R3);
FLUSH[P0];
1:
FLUSH[P0++];
@@ -247,17 +247,17 @@ ENTRY(_blackfin_dcache_flush_range)
* one more.
*/
FLUSH[P0];
- SSYNC;
+ SSYNC(R3);
RTS;
ENDPROC(_blackfin_dcache_flush_range)
ENTRY(_blackfin_dflush_page)
P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT);
P0 = R0;
- CSYNC;
+ CSYNC(R3);
FLUSH[P0];
LSETUP (.Lfl1, .Lfl1) LC0 = P1;
.Lfl1: FLUSH [P0++];
- SSYNC;
+ SSYNC(R3);
RTS;
ENDPROC(_blackfin_dflush_page)
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index b69f517a650..8be548e061b 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -139,7 +139,7 @@ __common_int_entry:
fp = 0;
#endif
-#ifdef ANOMALY_05000283
+#if defined (ANOMALY_05000283) || defined (ANOMALY_05000315)
cc = r7 == r7;
p5.h = 0xffc0;
p5.l = 0x0014;