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authorPhilippe Gerum <rpm@xenomai.org>2009-06-22 18:25:52 +0200
committerMike Frysinger <vapier@gentoo.org>2009-09-16 21:28:38 -0400
commit7a7967dc1b606f8c88e33bbec773bf82b4a52e6e (patch)
tree4196b28a1b48f9fa90ebfb66b3ff5e7fb1d82037 /arch/blackfin/mach-common
parent70f47202320623270f327e249df0121c09e45c09 (diff)
Blackfin: document __ipipe_call_irqtail
Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-common')
-rw-r--r--arch/blackfin/mach-common/interrupt.S25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 29fbf67f47f..c754ff74bd5 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -261,6 +261,31 @@ ENTRY(_evt_system_call)
ENDPROC(_evt_system_call)
#ifdef CONFIG_IPIPE
+/*
+ * __ipipe_call_irqtail: lowers the current priority level to EVT15
+ * before running a user-defined routine, then raises the priority
+ * level to EVT14 to prepare the caller for a normal interrupt
+ * return through RTI.
+ *
+ * We currently use this facility in two occasions:
+ *
+ * - to branch to __ipipe_irq_tail_hook as requested by a high
+ * priority domain after the pipeline delivered an interrupt,
+ * e.g. such as Xenomai, in order to start its rescheduling
+ * procedure, since we may not switch tasks when IRQ levels are
+ * nested on the Blackfin, so we have to fake an interrupt return
+ * so that we may reschedule immediately.
+ *
+ * - to branch to sync_root_irqs, in order to play any interrupt
+ * pending for the root domain (i.e. the Linux kernel). This lowers
+ * the core priority level enough so that Linux IRQ handlers may
+ * never delay interrupts handled by high priority domains; we defer
+ * those handlers until this point instead. This is a substitute
+ * to using a threaded interrupt model for the Linux kernel.
+ *
+ * r0: address of user-defined routine
+ * context: caller must have preempted EVT15, hw interrupts must be off.
+ */
ENTRY(___ipipe_call_irqtail)
p0 = r0;
r0.l = 1f;