diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-10 17:39:40 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-10 17:39:40 -0800 |
| commit | 06792c4dde2ad143928cc95c1ba218c6269c494b (patch) | |
| tree | 92bdd4631612c9e3d8e5f6f06839f75c5473300a /arch/c6x/kernel/vectors.S | |
| parent | 4690dfa8cd66c37fbe99bb8cd5baa86102110776 (diff) | |
| parent | 166c0eaedfc3157dc1394c27e827add19f05fb27 (diff) | |
Merge tag 'for-linux-3.3-merge-window' of git://linux-c6x.org/git/projects/linux-c6x-upstreaming
* tag 'for-linux-3.3-merge-window' of git://linux-c6x.org/git/projects/linux-c6x-upstreaming: (29 commits)
C6X: replace tick_nohz_stop/restart_sched_tick calls
C6X: add register_cpu call
C6X: deal with memblock API changes
C6X: fix timer64 initialization
C6X: fix layout of EMIFA registers
C6X: MAINTAINERS
C6X: DSCR - Device State Configuration Registers
C6X: EMIF - External Memory Interface
C6X: general SoC support
C6X: library code
C6X: headers
C6X: ptrace support
C6X: loadable module support
C6X: cache control
C6X: clocks
C6X: build infrastructure
C6X: syscalls
C6X: interrupt handling
C6X: time management
C6X: signal management
...
Diffstat (limited to 'arch/c6x/kernel/vectors.S')
| -rw-r--r-- | arch/c6x/kernel/vectors.S | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/arch/c6x/kernel/vectors.S b/arch/c6x/kernel/vectors.S new file mode 100644 index 00000000000..c95c66fc71e --- /dev/null +++ b/arch/c6x/kernel/vectors.S @@ -0,0 +1,81 @@ +; +; Port on Texas Instruments TMS320C6x architecture +; +; Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated +; Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) +; +; This program is free software; you can redistribute it and/or modify +; it under the terms of the GNU General Public License version 2 as +; published by the Free Software Foundation. +; +; This section handles all the interrupt vector routines. +; At RESET the processor sets up the DRAM timing parameters and +; branches to the label _c_int00 which handles initialization for the C code. +; + +#define ALIGNMENT 5 + + .macro IRQVEC name, handler + .align ALIGNMENT + .hidden \name + .global \name +\name: +#ifdef CONFIG_C6X_BIG_KERNEL + STW .D2T1 A0,*B15--[2] + || MVKL .S1 \handler,A0 + MVKH .S1 \handler,A0 + B .S2X A0 + LDW .D2T1 *++B15[2],A0 + NOP 4 + NOP + NOP + .endm +#else /* CONFIG_C6X_BIG_KERNEL */ + B .S2 \handler + NOP + NOP + NOP + NOP + NOP + NOP + NOP + .endm +#endif /* CONFIG_C6X_BIG_KERNEL */ + + .sect ".vectors","ax" + .align ALIGNMENT + .global RESET + .hidden RESET +RESET: +#ifdef CONFIG_C6X_BIG_KERNEL + MVKL .S1 _c_int00,A0 ; branch to _c_int00 + MVKH .S1 _c_int00,A0 + B .S2X A0 +#else + B .S2 _c_int00 + NOP + NOP +#endif + NOP + NOP + NOP + NOP + NOP + + + IRQVEC NMI,_nmi_handler ; NMI interrupt + IRQVEC AINT,_bad_interrupt ; reserved + IRQVEC MSGINT,_bad_interrupt ; reserved + + IRQVEC INT4,_int4_handler + IRQVEC INT5,_int5_handler + IRQVEC INT6,_int6_handler + IRQVEC INT7,_int7_handler + IRQVEC INT8,_int8_handler + IRQVEC INT9,_int9_handler + IRQVEC INT10,_int10_handler + IRQVEC INT11,_int11_handler + IRQVEC INT12,_int12_handler + IRQVEC INT13,_int13_handler + IRQVEC INT14,_int14_handler + IRQVEC INT15,_int15_handler |