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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-23 12:05:44 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-23 12:05:44 -0700
commit3813d4024a75562baf77d3907fb6afbf8f9c8232 (patch)
tree6675ef449bd0ed7adbe1b785eaed25db55bc29f3 /arch/ia64/include
parent2335a8366f63a5191b5a2b3c5a05d90fe814654c (diff)
parent4035c6db5a9dedf5e79c502bf39389a0b714cb38 (diff)
Merge tag 'ia64-3.5-merge' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux
Pull Itanium fixes from Tony Luck. * tag 'ia64-3.5-merge' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux: [IA64] Liberate the signal layer from IA64 assembler [IA64] Add cmpxchg.h to exported userspace headers [IA64] Fix fast syscall version of getcpu() [IA64] Removed "task_size" element from thread_struct - it is now constant
Diffstat (limited to 'arch/ia64/include')
-rw-r--r--arch/ia64/include/asm/Kbuild1
-rw-r--r--arch/ia64/include/asm/processor.h5
2 files changed, 2 insertions, 4 deletions
diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild
index 241d1c53ba6..d4eb9383f5f 100644
--- a/arch/ia64/include/asm/Kbuild
+++ b/arch/ia64/include/asm/Kbuild
@@ -1,6 +1,7 @@
include include/asm-generic/Kbuild.asm
header-y += break.h
+header-y += cmpxchg.h
header-y += fpu.h
header-y += gcc_intrin.h
header-y += ia64regs.h
diff --git a/arch/ia64/include/asm/processor.h b/arch/ia64/include/asm/processor.h
index 5a994ec8f06..832dd3789e9 100644
--- a/arch/ia64/include/asm/processor.h
+++ b/arch/ia64/include/asm/processor.h
@@ -34,8 +34,7 @@
* each (assuming 8KB page size), for a total of 8TB of user virtual
* address space.
*/
-#define TASK_SIZE_OF(tsk) ((tsk)->thread.task_size)
-#define TASK_SIZE TASK_SIZE_OF(current)
+#define TASK_SIZE DEFAULT_TASK_SIZE
/*
* This decides where the kernel will search for a free chunk of vm
@@ -280,7 +279,6 @@ struct thread_struct {
__u8 pad[3];
__u64 ksp; /* kernel stack pointer */
__u64 map_base; /* base address for get_unmapped_area() */
- __u64 task_size; /* limit for task size */
__u64 rbs_bot; /* the base address for the RBS */
int last_fph_cpu; /* CPU that may hold the contents of f32-f127 */
@@ -303,7 +301,6 @@ struct thread_struct {
.ksp = 0, \
.map_base = DEFAULT_MAP_BASE, \
.rbs_bot = STACK_TOP - DEFAULT_USER_STACK_SIZE, \
- .task_size = DEFAULT_TASK_SIZE, \
.last_fph_cpu = -1, \
INIT_THREAD_PM \
.dbr = {0, }, \