diff options
author | Joe Perches <joe@perches.com> | 2007-12-18 17:02:21 -0800 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2007-12-18 17:02:21 -0800 |
commit | 313d8e57b074d5f03dfed2755f21ae41a6f0fd5a (patch) | |
tree | d2eac737118e16b8bb05f18ca3f5a79856188906 /arch/ia64/sn/pci | |
parent | aec103bfa60e9f72bd66a144236592f54b986a03 (diff) |
[IA64] Two trivial spelling fixes
s/addres/address/
s/performanc/performance/
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/sn/pci')
-rw-r--r-- | arch/ia64/sn/pci/tioce_provider.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c index cee9379d44e..e1a3e19d3d9 100644 --- a/arch/ia64/sn/pci/tioce_provider.c +++ b/arch/ia64/sn/pci/tioce_provider.c @@ -41,7 +41,7 @@ * } else * do desired mmr access * - * According to hw, we can use reads instead of writes to the above addres + * According to hw, we can use reads instead of writes to the above address * * Note this WAR can only to be used for accessing internal MMR's in the * TIOCE Coretalk Address Range 0x0 - 0x07ff_ffff. This includes the |