diff options
| author | Matthew Wilcox <matthew@wil.cx> | 2009-10-12 08:24:30 -0600 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2009-10-13 10:44:42 -0700 |
| commit | adcd740341dbd58eb94a8c2885c171ce9eb8677c (patch) | |
| tree | 99cbbea95dc9864b3d39e12180ad8dcdeeabc04c /arch/ia64 | |
| parent | dec1798f81f7e8a299734bdc29197ae77bf08018 (diff) | |
[IA64] Require SAL 3.2 in order to do extended config space ops
We had assumed that SAL firmware would return an error if it didn't
understand extended config space. Unfortunately, the SAL on the SGI 750
doesn't do that, it panics the machine. So, condition the extended PCI
config space accesses on SAL revision 3.2.
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Tested-by: Brad Spengler <spender@grsecurity.net>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
| -rw-r--r-- | arch/ia64/pci/pci.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 7de76dd352f..c0fca2c1c85 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c @@ -56,10 +56,13 @@ int raw_pci_read(unsigned int seg, unsigned int bus, unsigned int devfn, if ((seg | reg) <= 255) { addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg); mode = 0; - } else { + } else if (sal_revision >= SAL_VERSION_CODE(3,2)) { addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg); mode = 1; + } else { + return -EINVAL; } + result = ia64_sal_pci_config_read(addr, mode, len, &data); if (result != 0) return -EINVAL; @@ -80,9 +83,11 @@ int raw_pci_write(unsigned int seg, unsigned int bus, unsigned int devfn, if ((seg | reg) <= 255) { addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg); mode = 0; - } else { + } else if (sal_revision >= SAL_VERSION_CODE(3,2)) { addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg); mode = 1; + } else { + return -EINVAL; } result = ia64_sal_pci_config_write(addr, mode, len, value); if (result != 0) |