diff options
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-05-05 10:12:55 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-05-05 10:12:55 +0100 |
| commit | f3831a592fe4332a70baad64a860b345398885b7 (patch) | |
| tree | fd27b986295fe5a4f1c0924a804228f829a4c894 /arch/m32r/include/asm/cachectl.h | |
| parent | 376f7839b72ec526173cafb5d8eadfc61e2effdf (diff) | |
| parent | 8560b9321f9050968f393ce1ec67e47c1a0bd5cf (diff) | |
Merge commit 'takashi/topic/asoc' into for-2.6.31
Diffstat (limited to 'arch/m32r/include/asm/cachectl.h')
| -rw-r--r-- | arch/m32r/include/asm/cachectl.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/m32r/include/asm/cachectl.h b/arch/m32r/include/asm/cachectl.h new file mode 100644 index 00000000000..2aab8f6fff4 --- /dev/null +++ b/arch/m32r/include/asm/cachectl.h @@ -0,0 +1,26 @@ +/* + * cachectl.h -- defines for M32R cache control system calls + * + * Copyright (C) 2003 by Kazuhiro Inaoka + */ +#ifndef __ASM_M32R_CACHECTL +#define __ASM_M32R_CACHECTL + +/* + * Options for cacheflush system call + * + * cacheflush() is currently fluch_cache_all(). + */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ + +/* + * Caching modes for the cachectl(2) call + * + * cachectl(2) is currently not supported and returns ENOSYS. + */ +#define CACHEABLE 0 /* make pages cacheable */ +#define UNCACHEABLE 1 /* make pages uncacheable */ + +#endif /* __ASM_M32R_CACHECTL */ |