diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2009-05-20 09:02:28 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2009-05-20 09:02:28 +0200 |
| commit | 521c180874dae86f675d23c4eade4dba8b1f2cc8 (patch) | |
| tree | 7509303da3a9a1b40a26f6811f321c89cd31737b /arch/m32r/include/asm/cachectl.h | |
| parent | f1a11e0576c7a73d759d05d776692b2b2d37172b (diff) | |
| parent | 64d1304a64477629cb16b75491a77bafe6f86963 (diff) | |
Merge branch 'core/urgent' into core/futexes
Merge reason: this branch was on an pre -rc1 base, merge it up to -rc6+
to get the latest upstream fixes.
Conflicts:
kernel/futex.c
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/m32r/include/asm/cachectl.h')
| -rw-r--r-- | arch/m32r/include/asm/cachectl.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/m32r/include/asm/cachectl.h b/arch/m32r/include/asm/cachectl.h new file mode 100644 index 00000000000..2aab8f6fff4 --- /dev/null +++ b/arch/m32r/include/asm/cachectl.h @@ -0,0 +1,26 @@ +/* + * cachectl.h -- defines for M32R cache control system calls + * + * Copyright (C) 2003 by Kazuhiro Inaoka + */ +#ifndef __ASM_M32R_CACHECTL +#define __ASM_M32R_CACHECTL + +/* + * Options for cacheflush system call + * + * cacheflush() is currently fluch_cache_all(). + */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ + +/* + * Caching modes for the cachectl(2) call + * + * cachectl(2) is currently not supported and returns ENOSYS. + */ +#define CACHEABLE 0 /* make pages cacheable */ +#define UNCACHEABLE 1 /* make pages uncacheable */ + +#endif /* __ASM_M32R_CACHECTL */ |