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| author | H. Peter Anvin <hpa@zytor.com> | 2009-05-23 16:42:19 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2009-05-23 16:42:19 -0700 |
| commit | ee0736627d3347be0be2769fa7b26431f9726c9d (patch) | |
| tree | 203e2204daaec4cf005463fdf2c7bf380d6eef36 /arch/m32r/include/asm/cachectl.h | |
| parent | cf9972a921470b0a2da7906104bcd540b20e33bf (diff) | |
| parent | 0af48f42df15b97080b450d24219dd95db7b929a (diff) | |
Merge branch 'x86/urgent' into x86/setup
Resolved conflicts:
arch/x86/boot/memory.c
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/m32r/include/asm/cachectl.h')
| -rw-r--r-- | arch/m32r/include/asm/cachectl.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/m32r/include/asm/cachectl.h b/arch/m32r/include/asm/cachectl.h new file mode 100644 index 00000000000..2aab8f6fff4 --- /dev/null +++ b/arch/m32r/include/asm/cachectl.h @@ -0,0 +1,26 @@ +/* + * cachectl.h -- defines for M32R cache control system calls + * + * Copyright (C) 2003 by Kazuhiro Inaoka + */ +#ifndef __ASM_M32R_CACHECTL +#define __ASM_M32R_CACHECTL + +/* + * Options for cacheflush system call + * + * cacheflush() is currently fluch_cache_all(). + */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ + +/* + * Caching modes for the cachectl(2) call + * + * cachectl(2) is currently not supported and returns ENOSYS. + */ +#define CACHEABLE 0 /* make pages cacheable */ +#define UNCACHEABLE 1 /* make pages uncacheable */ + +#endif /* __ASM_M32R_CACHECTL */ |