diff options
author | Greg Ungerer <gerg@uclinux.org> | 2011-12-24 12:42:30 +1000 |
---|---|---|
committer | Greg Ungerer <gerg@uclinux.org> | 2012-03-05 09:43:09 +1000 |
commit | 3b2039b26619745a736b896caf8df05a2a15df3a (patch) | |
tree | 2a60f2a6fb175f453b7f7f0858732ce52ae87b06 /arch/m68k/include/asm/m528xsim.h | |
parent | 6c84a60eb98911cb376cf0a340f811401f3b29a4 (diff) |
m68knommu: make 528x QSPI platform addressing consistent
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 528x QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m528xsim.h')
-rw-r--r-- | arch/m68k/include/asm/m528xsim.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index a363c648b97..e4581a4a103 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h @@ -51,6 +51,8 @@ #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) +#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI) + /* * SDRAM configuration registers. */ @@ -82,6 +84,17 @@ #define MCFFEC_SIZE0 0x800 /* + * QSPI module. + */ +#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) +#define MCFQSPI_SIZE 0x40 + +#define MCFQSPI_CS0 147 +#define MCFQSPI_CS1 148 +#define MCFQSPI_CS2 149 +#define MCFQSPI_CS3 150 + +/* * GPIO registers */ #define MCFGPIO_PORTA (MCF_IPSBAR + 0x00100000) |