diff options
| author | Greg Ungerer <gerg@uclinux.org> | 2010-11-04 13:53:26 +1000 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2011-01-05 15:19:18 +1000 |
| commit | 1c83af5f9d7e15a091f11394ad5916a7dcf1a99e (patch) | |
| tree | aa41743fb552319bb53959a7df228233d4f04ba2 /arch/m68k/include/asm/mcfcache.h | |
| parent | 0762346034a3e94f9c3a5fe8d7c4bcaffbc1cd53 (diff) | |
m68knommu: use user stack pointer hardware on some ColdFire cores
The more modern ColdFire parts (even if based on older version cores)
have separate user and supervisor stack pointers (a7 register).
Modify the ColdFire CPU setup and exception code to enable and use
this on parts that have it.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/mcfcache.h')
| -rw-r--r-- | arch/m68k/include/asm/mcfcache.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/m68k/include/asm/mcfcache.h b/arch/m68k/include/asm/mcfcache.h index 1b66018461b..437686b62fe 100644 --- a/arch/m68k/include/asm/mcfcache.h +++ b/arch/m68k/include/asm/mcfcache.h @@ -46,7 +46,7 @@ movec %d0,%ACR0 movel #0x00000000,%d0 /* no other regions cached */ movec %d0,%ACR1 - movel #0x80400100,%d0 /* configure cache */ + movel #0x80400110,%d0 /* configure cache */ movec %d0,%CACR /* enable cache */ nop .endm @@ -101,7 +101,7 @@ movec %d0,%ACR0 movel #0x00000000,%d0 /* no other regions cached */ movec %d0,%ACR1 - movel #0x80000200,%d0 /* setup cache mask */ + movel #0x80000210,%d0 /* setup cache mask */ movec %d0,%CACR /* enable cache */ nop .endm @@ -142,7 +142,7 @@ movec %d0,%ACR0 move.l #0x00000000,%d0 /* no other regions cached */ movec %d0,%ACR1 - move.l #0x80400000,%d0 /* enable 8K instruction cache */ + move.l #0x80400010,%d0 /* enable 8K instruction cache */ movec %d0,%CACR nop .endm |