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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-25 07:44:27 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-25 07:44:27 -0700
commit4b37ba90f49d4157ac5628f8d730d3505f176724 (patch)
treefdb3d04426f7b72ee86b1f06be746624494493c5 /arch/m68k/include/asm/mcfslt.h
parent229aebb873e29726b91e076161649cf45154b0bf (diff)
parent55f411de484a0136a77d050e877578a60bc2e094 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (21 commits) m68knommu: convert to using tracehook_report_syscall_* m68knommu: some boards use fixed phy for FEC ethernet m68knommu: support the external GPIO based interrupts of the 5272 m68knommu: mask of vector bits in exception word properly m68knommu: change to new flag variables m68knommu: Fix MCFUART_TXFIFOSIZE for m548x. m68knommu: add basic mmu-less m548x support m68knommu: .gitignore vmlinux.lds m68knommu: stop using __do_IRQ m68knommu: rename PT_OFF_VECTOR to PT_OFF_FORMATVEC. m68knommu: add support for Coldfire 547x/548x interrupt controller m68k{nommu}: Remove unused DEFINE's from asm-offsets.c m68knommu: whitespace cleanup in 68328/entry.S m68knommu: Document supported chips in intc-2.c and intc-simr.c. m68knommu: fix strace support for 68328/68360 m68knommu: fix default starting date arch/m68knommu: Removing dead 68328_SERIAL_UART2 config option arch/m68knommu: Removing dead RAM_{16,32}_MB config option arch/m68knommu: Removing dead M68KFPU_EMU config option arch/m68knommu: Removing dead RELOCATE config option ...
Diffstat (limited to 'arch/m68k/include/asm/mcfslt.h')
-rw-r--r--arch/m68k/include/asm/mcfslt.h44
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/mcfslt.h b/arch/m68k/include/asm/mcfslt.h
new file mode 100644
index 00000000000..d0d0ecba533
--- /dev/null
+++ b/arch/m68k/include/asm/mcfslt.h
@@ -0,0 +1,44 @@
+/****************************************************************************/
+
+/*
+ * mcfslt.h -- ColdFire internal Slice (SLT) timer support defines.
+ *
+ * (C) Copyright 2004, Greg Ungerer (gerg@snapgear.com)
+ * (C) Copyright 2009, Philippe De Muyter (phdm@macqel.be)
+ */
+
+/****************************************************************************/
+#ifndef mcfslt_h
+#define mcfslt_h
+/****************************************************************************/
+
+/*
+ * Get address specific defines for the 547x.
+ */
+#define MCFSLT_TIMER0 0x900 /* Base address of TIMER0 */
+#define MCFSLT_TIMER1 0x910 /* Base address of TIMER1 */
+
+
+/*
+ * Define the SLT timer register set addresses.
+ */
+#define MCFSLT_STCNT 0x00 /* Terminal count */
+#define MCFSLT_SCR 0x04 /* Control */
+#define MCFSLT_SCNT 0x08 /* Current count */
+#define MCFSLT_SSR 0x0C /* Status */
+
+/*
+ * Bit definitions for the SCR control register.
+ */
+#define MCFSLT_SCR_RUN 0x04000000 /* Run mode (continuous) */
+#define MCFSLT_SCR_IEN 0x02000000 /* Interrupt enable */
+#define MCFSLT_SCR_TEN 0x01000000 /* Timer enable */
+
+/*
+ * Bit definitions for the SSR status register.
+ */
+#define MCFSLT_SSR_BE 0x02000000 /* Bus error condition */
+#define MCFSLT_SSR_TE 0x01000000 /* Timeout condition */
+
+/****************************************************************************/
+#endif /* mcfslt_h */